From: Christoph Hellwig <hch@lst.de>
To: Krishnamraju Eraparaju <krishna2@chelsio.com>
Cc: sagi@grimberg.me, linux-rdma@vger.kernel.org,
Potnuri Bharat Teja <bharat@chelsio.com>,
Nirranjan Kirubaharan <nirranjan@chelsio.com>,
linux-nvme@lists.infradead.org,
Bernard Metzler <BMT@zurich.ibm.com>,
hch@lst.de
Subject: Re: broken CRCs at NVMeF target with SIW & NVMe/TCP transports
Date: Tue, 17 Mar 2020 13:45:33 +0100 [thread overview]
Message-ID: <20200317124533.GB12316@lst.de> (raw)
In-Reply-To: <20200316162008.GA7001@chelsio.com>
On Mon, Mar 16, 2020 at 09:50:10PM +0530, Krishnamraju Eraparaju wrote:
>
> I'm seeing broken CRCs at NVMeF target while running the below program
> at host. Here RDMA transport is SoftiWARP, but I'm also seeing the
> same issue with NVMe/TCP aswell.
>
> It appears to me that the same buffer is being rewritten by the
> application/ULP before getting the completion for the previous requests.
> getting the completion for the previous requests. HW based
> HW based trasports(like iw_cxgb4) are not showing this issue because
> they copy/DMA and then compute the CRC on copied buffer.
For TCP we can set BDI_CAP_STABLE_WRITES. For RDMA I don't think that
is a good idea as pretty much all RDMA block drivers rely on the
DMA behavior above. The answer is to bounce buffer the data in
SoftiWARP / SoftRoCE.
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WARNING: multiple messages have this Message-ID (diff)
From: Christoph Hellwig <hch@lst.de>
To: Krishnamraju Eraparaju <krishna2@chelsio.com>
Cc: Bernard Metzler <BMT@zurich.ibm.com>,
sagi@grimberg.me, hch@lst.de, linux-nvme@lists.infradead.org,
linux-rdma@vger.kernel.org,
Nirranjan Kirubaharan <nirranjan@chelsio.com>,
Potnuri Bharat Teja <bharat@chelsio.com>
Subject: Re: broken CRCs at NVMeF target with SIW & NVMe/TCP transports
Date: Tue, 17 Mar 2020 13:45:33 +0100 [thread overview]
Message-ID: <20200317124533.GB12316@lst.de> (raw)
In-Reply-To: <20200316162008.GA7001@chelsio.com>
On Mon, Mar 16, 2020 at 09:50:10PM +0530, Krishnamraju Eraparaju wrote:
>
> I'm seeing broken CRCs at NVMeF target while running the below program
> at host. Here RDMA transport is SoftiWARP, but I'm also seeing the
> same issue with NVMe/TCP aswell.
>
> It appears to me that the same buffer is being rewritten by the
> application/ULP before getting the completion for the previous requests.
> getting the completion for the previous requests. HW based
> HW based trasports(like iw_cxgb4) are not showing this issue because
> they copy/DMA and then compute the CRC on copied buffer.
For TCP we can set BDI_CAP_STABLE_WRITES. For RDMA I don't think that
is a good idea as pretty much all RDMA block drivers rely on the
DMA behavior above. The answer is to bounce buffer the data in
SoftiWARP / SoftRoCE.
next prev parent reply other threads:[~2020-03-17 12:45 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-16 16:20 broken CRCs at NVMeF target with SIW & NVMe/TCP transports Krishnamraju Eraparaju
2020-03-16 16:20 ` Krishnamraju Eraparaju
2020-03-17 9:31 ` Bernard Metzler
2020-03-17 9:31 ` Bernard Metzler
2020-03-17 12:26 ` Tom Talpey
2020-03-17 12:26 ` Tom Talpey
2020-03-17 12:45 ` Christoph Hellwig [this message]
2020-03-17 12:45 ` Christoph Hellwig
2020-03-17 13:17 ` Bernard Metzler
2020-03-17 13:17 ` Bernard Metzler
2020-03-17 16:03 ` Sagi Grimberg
2020-03-17 16:03 ` Sagi Grimberg
2020-03-17 16:29 ` Bernard Metzler
2020-03-17 16:29 ` Bernard Metzler
2020-03-17 16:39 ` Sagi Grimberg
2020-03-17 16:39 ` Sagi Grimberg
2020-03-17 19:17 ` Krishnamraju Eraparaju
2020-03-17 19:17 ` Krishnamraju Eraparaju
2020-03-17 19:33 ` Sagi Grimberg
2020-03-17 19:33 ` Sagi Grimberg
2020-03-17 20:31 ` Krishnamraju Eraparaju
2020-03-17 20:31 ` Krishnamraju Eraparaju
2020-03-18 16:49 ` Sagi Grimberg
2020-03-18 16:49 ` Sagi Grimberg
2020-03-20 14:35 ` Krishnamraju Eraparaju
2020-03-20 14:35 ` Krishnamraju Eraparaju
2020-03-20 20:49 ` Sagi Grimberg
2020-03-20 20:49 ` Sagi Grimberg
2020-03-21 4:02 ` Krishnamraju Eraparaju
2020-03-21 4:02 ` Krishnamraju Eraparaju
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