Re: [Intel-gfx] [PATCH] drm/i915: Enable non-contiguous pipe fusing

From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH] drm/i915: Enable non-contiguous pipe fusing
Date: Wed, 18 Mar 2020 18:48:27 +0200	[thread overview]
Message-ID: <20200318164827.GC13686@intel.com> (raw)
In-Reply-To: <20200313073917.aeki7lm6zupx7y26@ldmartin-desk1>

On Fri, Mar 13, 2020 at 12:39:17AM -0700, Lucas De Marchi wrote:
> On Wed, Mar 11, 2020 at 02:06:32PM +0530, Anshuman Gupta wrote:
> >Allow 3-display pipes SKU system with any combination
> >in INTEL_INFO pipe mask.
> >B.Spec:50075
> >
> >changes since RFC:
> >- using intel_pipe_mask_is_valid() function to check integrity of
> >  pipe_mask. [Ville]
> >v2:
> >- simplify condition in intel_pipe_mask_is_valid(). [Ville]
> >v3:
> >- removed non-contiguous pipe fusing check. [Lucas]
> 
> I'd also say in the commit message that the support for non-contiguous
> pipe fusing is *already* supported in the driver. So this check here
> doesn't make sense anymore and since it's an unlike condition we
> can just stop checking.

BTW I think we still have those crtc index==pipe asserts in the code
somewhere. Now that all the (known) assumptions have been fixed we can
remove the WARNs.

> 
> Aside from commit message update,
> 
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
> 
> Lucas De Marchi
> 
> >
> >Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> >Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> >---
> > drivers/gpu/drm/i915/intel_device_info.c | 12 +-----------
> > 1 file changed, 1 insertion(+), 11 deletions(-)
> >
> >diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> >index d7fe12734db8..9ff89e142ff1 100644
> >--- a/drivers/gpu/drm/i915/intel_device_info.c
> >+++ b/drivers/gpu/drm/i915/intel_device_info.c
> >@@ -998,17 +998,7 @@ void intel_device_info_runtime_init(struct drm_i915_private *dev_priv)
> > 		    (dfsm & TGL_DFSM_PIPE_D_DISABLE))
> > 			enabled_mask &= ~BIT(PIPE_D);
> >
> >-		/*
> >-		 * At least one pipe should be enabled and if there are
> >-		 * disabled pipes, they should be the last ones, with no holes
> >-		 * in the mask.
> >-		 */
> >-		if (enabled_mask == 0 || !is_power_of_2(enabled_mask + 1))
> >-			drm_err(&dev_priv->drm,
> >-				"invalid pipe fuse configuration: enabled_mask=0x%x\n",
> >-				enabled_mask);
> >-		else
> >-			info->pipe_mask = enabled_mask;
> >+		info->pipe_mask = enabled_mask;
> >
> > 		if (dfsm & SKL_DFSM_DISPLAY_HDCP_DISABLE)
> > 			info->display.has_hdcp = 0;
> >-- 
> >2.25.1
> >

-- 
Ville Syrjälä
Intel
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