From: Thierry Reding <thierry.reding@gmail.com>
To: Linus Walleij <linus.walleij@linaro.org>
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>,
Jon Hunter <jonathanh@nvidia.com>,
Vidya Sagar <vidyas@nvidia.com>,
"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
linux-tegra@vger.kernel.org
Subject: Re: [PATCH 0/9] pinctrl: tegra: Support SFIO/GPIO programming
Date: Mon, 23 Mar 2020 14:16:46 +0100 [thread overview]
Message-ID: <20200323131646.GF3883508@ulmo> (raw)
In-Reply-To: <CACRpkdY7LnyHdX4xKrr1V8Cquched0PMNL1sFTrWT6J3fdRx=w@mail.gmail.com>
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On Fri, Mar 20, 2020 at 08:37:48PM +0100, Linus Walleij wrote:
> On Thu, Mar 19, 2020 at 1:27 PM Thierry Reding <thierry.reding@gmail.com> wrote:
>
> > This series of patches establishes the mapping of these two pins to
> > their GPIO equivalents and implements the code necessary to switch
> > between SFIO and GPIO modes when the kernel requests or releases the
> > GPIOs, respectively.
>
> Is it possible to apply the gpio and pinctrl patches to
> each tree separately?
Yes, that should be possible. There's a dependency from patches 2 & 3 on
patch 1, but since they are all for the same tree that should be fine.
The dependency also is only a runtime dependency where the GPIO driver
would defer probe indefinitely because no pin range would ever be added.
So as long as patches 1-3 are applied in the order given in this series,
everything should be okay.
Thierry
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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: Linus Walleij <linus.walleij-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org>
Cc: Bartosz Golaszewski
<bgolaszewski-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>,
Jon Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Vidya Sagar <vidyas-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
"open list:GPIO SUBSYSTEM"
<linux-gpio-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH 0/9] pinctrl: tegra: Support SFIO/GPIO programming
Date: Mon, 23 Mar 2020 14:16:46 +0100 [thread overview]
Message-ID: <20200323131646.GF3883508@ulmo> (raw)
In-Reply-To: <CACRpkdY7LnyHdX4xKrr1V8Cquched0PMNL1sFTrWT6J3fdRx=w@mail.gmail.com>
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On Fri, Mar 20, 2020 at 08:37:48PM +0100, Linus Walleij wrote:
> On Thu, Mar 19, 2020 at 1:27 PM Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> wrote:
>
> > This series of patches establishes the mapping of these two pins to
> > their GPIO equivalents and implements the code necessary to switch
> > between SFIO and GPIO modes when the kernel requests or releases the
> > GPIOs, respectively.
>
> Is it possible to apply the gpio and pinctrl patches to
> each tree separately?
Yes, that should be possible. There's a dependency from patches 2 & 3 on
patch 1, but since they are all for the same tree that should be fine.
The dependency also is only a runtime dependency where the GPIO driver
would defer probe indefinitely because no pin range would ever be added.
So as long as patches 1-3 are applied in the order given in this series,
everything should be okay.
Thierry
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next prev parent reply other threads:[~2020-03-23 13:16 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-19 12:27 [PATCH 0/9] pinctrl: tegra: Support SFIO/GPIO programming Thierry Reding
2020-03-19 12:27 ` Thierry Reding
2020-03-19 12:27 ` [PATCH 1/9] gpio: Support GPIO controllers without pin-ranges Thierry Reding
2020-03-19 12:27 ` Thierry Reding
2020-03-19 17:05 ` Vidya Sagar
2020-03-19 17:05 ` Vidya Sagar
2020-03-21 12:34 ` kbuild test robot
2020-03-27 10:37 ` Linus Walleij
2020-03-27 10:37 ` Linus Walleij
2020-03-27 12:13 ` Thierry Reding
2020-03-27 12:13 ` Thierry Reding
2020-03-19 12:27 ` [PATCH 2/9] gpio: tegra186: Add support for pin ranges Thierry Reding
2020-03-19 17:05 ` Vidya Sagar
2020-03-19 17:05 ` Vidya Sagar
2020-03-27 10:39 ` Linus Walleij
2020-03-27 10:39 ` Linus Walleij
2020-03-31 20:53 ` Thierry Reding
2020-03-19 12:27 ` [PATCH 3/9] gpio: tegra186: Add Tegra194 pin ranges for GG.0 and GG.1 Thierry Reding
2020-03-19 17:06 ` Vidya Sagar
2020-03-19 17:06 ` Vidya Sagar
2020-03-27 10:39 ` Linus Walleij
2020-03-27 10:39 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 4/9] pinctrl: tegra: Fix whitespace issues for improved readability Thierry Reding
2020-03-19 12:27 ` Thierry Reding
2020-03-19 17:06 ` Vidya Sagar
2020-03-19 17:06 ` Vidya Sagar
2020-03-27 10:40 ` Linus Walleij
2020-03-27 10:40 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 5/9] pinctrl: tegra: Fix "Scmitt" -> "Schmitt" typo Thierry Reding
2020-03-19 17:07 ` Vidya Sagar
2020-03-19 17:07 ` Vidya Sagar
2020-03-27 10:42 ` Linus Walleij
2020-03-27 10:42 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 6/9] pinctrl: tegra: Pass struct tegra_pmx for pin range check Thierry Reding
2020-03-19 12:27 ` Thierry Reding
2020-03-19 17:07 ` Vidya Sagar
2020-03-19 17:07 ` Vidya Sagar
2020-03-27 10:43 ` Linus Walleij
2020-03-27 10:43 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 7/9] pinctrl: tegra: Do not add default pin range on Tegra194 Thierry Reding
2020-03-19 12:27 ` Thierry Reding
2020-03-19 17:08 ` Vidya Sagar
2020-03-19 17:08 ` Vidya Sagar
2020-03-27 10:44 ` Linus Walleij
2020-03-27 10:44 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 8/9] pinctrl: tegra: Renumber the GG.0 and GG.1 pins Thierry Reding
2020-03-19 12:27 ` Thierry Reding
2020-03-19 17:08 ` Vidya Sagar
2020-03-19 17:08 ` Vidya Sagar
2020-03-27 10:45 ` Linus Walleij
2020-03-27 10:45 ` Linus Walleij
2020-03-19 12:27 ` [PATCH 9/9] pinctrl: tegra: Add SFIO/GPIO programming on Tegra194 Thierry Reding
2020-03-19 12:27 ` Thierry Reding
2020-03-19 17:08 ` Vidya Sagar
2020-03-19 17:08 ` Vidya Sagar
2020-03-27 10:46 ` Linus Walleij
2020-03-27 10:46 ` Linus Walleij
2020-03-19 17:04 ` [PATCH 0/9] pinctrl: tegra: Support SFIO/GPIO programming Vidya Sagar
2020-03-19 17:04 ` Vidya Sagar
2020-03-20 19:37 ` Linus Walleij
2020-03-20 19:37 ` Linus Walleij
2020-03-23 13:16 ` Thierry Reding [this message]
2020-03-23 13:16 ` Thierry Reding
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