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From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Mark Rutland <mark.rutland@arm.com>, Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	devicetree@vger.kernel.org, Fabio Estevam <festevam@gmail.com>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Liam Girdwood <lgirdwood@gmail.com>,
	linux-kernel@vger.kernel.org,
	Philippe Schenker <philippe.schenker@toradex.com>,
	Rob Herring <robh+dt@kernel.org>, Mark Brown <broonie@kernel.org>,
	linux-imx@nxp.com, kernel@pengutronix.de,
	David Jander <david@protonic.nl>,
	netdev@vger.kernel.org, Shawn Guo <shawnguo@kernel.org>,
	"David S. Miller" <davem@davemloft.net>,
	linux-arm-kernel@lists.infradead.org,
	Heiner Kallweit <hkallweit1@gmail.com>
Subject: Re: [PATCH] net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035
Date: Wed, 1 Apr 2020 18:17:48 +0100	[thread overview]
Message-ID: <20200401171747.GW25745@shell.armlinux.org.uk> (raw)
In-Reply-To: <20200401095732.23197-1-o.rempel@pengutronix.de>

On Wed, Apr 01, 2020 at 11:57:32AM +0200, Oleksij Rempel wrote:
> The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
> for the values that comprise the fields, not zero-bits-set.
> 
> This patch fixes the clock frequency configuration for ATH8030 and
> ATH8035 Atheros PHYs by removing the erroneous "~".
> 
> To reproduce this bug, configure the PHY  with the device tree binding
> "qca,clk-out-frequency" and remove the machine specific PHY fixups.
> 
> Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding")
> Reported-by: Russell King <linux@armlinux.org.uk>

Please replace this with:

Reported-by: Russell King <rmk+kernel@armlinux.org.uk>

> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Russell King <rmk+kernel@armlinux.org.uk>

Thanks.

> ---
>  drivers/net/phy/at803x.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
> index 481cf48c9b9e4..31f731e6df720 100644
> --- a/drivers/net/phy/at803x.c
> +++ b/drivers/net/phy/at803x.c
> @@ -425,8 +425,8 @@ static int at803x_parse_dt(struct phy_device *phydev)
>  		 */
>  		if (at803x_match_phy_id(phydev, ATH8030_PHY_ID) ||
>  		    at803x_match_phy_id(phydev, ATH8035_PHY_ID)) {
> -			priv->clk_25m_reg &= ~AT8035_CLK_OUT_MASK;
> -			priv->clk_25m_mask &= ~AT8035_CLK_OUT_MASK;
> +			priv->clk_25m_reg &= AT8035_CLK_OUT_MASK;
> +			priv->clk_25m_mask &= AT8035_CLK_OUT_MASK;
>  		}
>  	}
>  
> -- 
> 2.26.0.rc2
> 
> 

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up

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WARNING: multiple messages have this Message-ID (diff)
From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Oleksij Rempel <o.rempel@pengutronix.de>
Cc: Andrew Lunn <andrew@lunn.ch>,
	Florian Fainelli <f.fainelli@gmail.com>,
	Heiner Kallweit <hkallweit1@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Rob Herring <robh+dt@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Shawn Guo <shawnguo@kernel.org>, David Jander <david@protonic.nl>,
	"David S. Miller" <davem@davemloft.net>,
	devicetree@vger.kernel.org, Fabio Estevam <festevam@gmail.com>,
	kernel@pengutronix.de, Liam Girdwood <lgirdwood@gmail.com>,
	linux-arm-kernel@lists.infradead.org, linux-imx@nxp.com,
	linux-kernel@vger.kernel.org, Mark Brown <broonie@kernel.org>,
	netdev@vger.kernel.org,
	Philippe Schenker <philippe.schenker@toradex.com>
Subject: Re: [PATCH] net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035
Date: Wed, 1 Apr 2020 18:17:48 +0100	[thread overview]
Message-ID: <20200401171747.GW25745@shell.armlinux.org.uk> (raw)
In-Reply-To: <20200401095732.23197-1-o.rempel@pengutronix.de>

On Wed, Apr 01, 2020 at 11:57:32AM +0200, Oleksij Rempel wrote:
> The masks in priv->clk_25m_reg and priv->clk_25m_mask are one-bits-set
> for the values that comprise the fields, not zero-bits-set.
> 
> This patch fixes the clock frequency configuration for ATH8030 and
> ATH8035 Atheros PHYs by removing the erroneous "~".
> 
> To reproduce this bug, configure the PHY  with the device tree binding
> "qca,clk-out-frequency" and remove the machine specific PHY fixups.
> 
> Fixes: 2f664823a47021 ("net: phy: at803x: add device tree binding")
> Reported-by: Russell King <linux@armlinux.org.uk>

Please replace this with:

Reported-by: Russell King <rmk+kernel@armlinux.org.uk>

> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Russell King <rmk+kernel@armlinux.org.uk>
Tested-by: Russell King <rmk+kernel@armlinux.org.uk>

Thanks.

> ---
>  drivers/net/phy/at803x.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/net/phy/at803x.c b/drivers/net/phy/at803x.c
> index 481cf48c9b9e4..31f731e6df720 100644
> --- a/drivers/net/phy/at803x.c
> +++ b/drivers/net/phy/at803x.c
> @@ -425,8 +425,8 @@ static int at803x_parse_dt(struct phy_device *phydev)
>  		 */
>  		if (at803x_match_phy_id(phydev, ATH8030_PHY_ID) ||
>  		    at803x_match_phy_id(phydev, ATH8035_PHY_ID)) {
> -			priv->clk_25m_reg &= ~AT8035_CLK_OUT_MASK;
> -			priv->clk_25m_mask &= ~AT8035_CLK_OUT_MASK;
> +			priv->clk_25m_reg &= AT8035_CLK_OUT_MASK;
> +			priv->clk_25m_mask &= AT8035_CLK_OUT_MASK;
>  		}
>  	}
>  
> -- 
> 2.26.0.rc2
> 
> 

-- 
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 10.2Mbps down 587kbps up

  reply	other threads:[~2020-04-01 17:18 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-01  9:57 [PATCH] net: phy: at803x: fix clock sink configuration on ATH8030 and ATH8035 Oleksij Rempel
2020-04-01  9:57 ` Oleksij Rempel
2020-04-01 17:17 ` Russell King - ARM Linux admin [this message]
2020-04-01 17:17   ` Russell King - ARM Linux admin
2020-04-01 18:21 ` David Miller
2020-04-01 18:21   ` David Miller

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