From: Shawn Guo <shawnguo@kernel.org>
To: peng.fan@nxp.com
Cc: sboyd@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-imx@nxp.com, aisheng.dong@nxp.com,
abel.vesa@nxp.com, Anson.Huang@nxp.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH V3] clk: imx7ulp: make it easy to change ARM core clk
Date: Tue, 14 Apr 2020 21:36:40 +0800 [thread overview]
Message-ID: <20200414133639.GC30676@dragon> (raw)
In-Reply-To: <1584347553-2654-1-git-send-email-peng.fan@nxp.com>
On Mon, Mar 16, 2020 at 04:32:33PM +0800, peng.fan@nxp.com wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> ARM clk could only source from divcore or hsrun_divcore.
>
> Follow what we already used on i.MX7D and i.MX8M SoCs, use
> imx_clk_hw_cpu API. When ARM core is running normaly,
> whether divcore or hwrun_divcore will finally source
> from SPLL_PFD0. However SPLL_PFD0 is marked with CLK_SET_GATE,
> so we need to disable SPLL_PFD0, when configure the rate.
> So add CORE and HSRUN_CORE virtual clk to make it easy to
> configure the clk using imx_clk_hw_cpu API.
>
> Since CORE and HSRUN_CORE already marked with CLK_IS_CRITICAL, no
> need to set ARM as CLK_IS_CRITICAL. And when set the rate of ARM clk,
> prograting it the parent with CLK_SET_RATE_PARENT will finally set
> the SPLL_PFD0 clk.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Applied, thanks.
WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: peng.fan@nxp.com
Cc: aisheng.dong@nxp.com, abel.vesa@nxp.com, Anson.Huang@nxp.com,
sboyd@kernel.org, s.hauer@pengutronix.de,
linux-kernel@vger.kernel.org, linux-imx@nxp.com,
kernel@pengutronix.de, festevam@gmail.com,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH V3] clk: imx7ulp: make it easy to change ARM core clk
Date: Tue, 14 Apr 2020 21:36:40 +0800 [thread overview]
Message-ID: <20200414133639.GC30676@dragon> (raw)
In-Reply-To: <1584347553-2654-1-git-send-email-peng.fan@nxp.com>
On Mon, Mar 16, 2020 at 04:32:33PM +0800, peng.fan@nxp.com wrote:
> From: Peng Fan <peng.fan@nxp.com>
>
> ARM clk could only source from divcore or hsrun_divcore.
>
> Follow what we already used on i.MX7D and i.MX8M SoCs, use
> imx_clk_hw_cpu API. When ARM core is running normaly,
> whether divcore or hwrun_divcore will finally source
> from SPLL_PFD0. However SPLL_PFD0 is marked with CLK_SET_GATE,
> so we need to disable SPLL_PFD0, when configure the rate.
> So add CORE and HSRUN_CORE virtual clk to make it easy to
> configure the clk using imx_clk_hw_cpu API.
>
> Since CORE and HSRUN_CORE already marked with CLK_IS_CRITICAL, no
> need to set ARM as CLK_IS_CRITICAL. And when set the rate of ARM clk,
> prograting it the parent with CLK_SET_RATE_PARENT will finally set
> the SPLL_PFD0 clk.
>
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Applied, thanks.
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next prev parent reply other threads:[~2020-04-14 13:37 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-16 8:32 [PATCH V3] clk: imx7ulp: make it easy to change ARM core clk peng.fan
2020-03-16 8:32 ` peng.fan
2020-04-10 2:57 ` Peng Fan
2020-04-10 2:57 ` Peng Fan
2020-04-14 8:54 ` Abel Vesa
2020-04-14 8:54 ` Abel Vesa
2020-04-14 13:36 ` Shawn Guo [this message]
2020-04-14 13:36 ` Shawn Guo
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