From: Wolfram Sang <wsa@the-dreams.de>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>,
Jonathan Hunter <jonathanh@nvidia.com>,
Laxman Dewangan <ldewangan@nvidia.com>,
linux-i2c@vger.kernel.org, linux-tegra@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 2/2] i2c: tegra: Synchronize DMA before termination
Date: Wed, 15 Apr 2020 18:31:24 +0200 [thread overview]
Message-ID: <20200415163123.GD2830@ninjato> (raw)
In-Reply-To: <20200324191217.1829-3-digetx@gmail.com>
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On Tue, Mar 24, 2020 at 10:12:17PM +0300, Dmitry Osipenko wrote:
> DMA transfer could be completed, but CPU (which handles DMA interrupt)
> may get too busy and can't handle the interrupt in a timely manner,
> despite of DMA IRQ being raised. In this case the DMA state needs to
> synchronized before terminating DMA transfer in order not to miss the
> DMA transfer completion.
>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Applied to for-current, thanks!
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WARNING: multiple messages have this Message-ID (diff)
From: Wolfram Sang <wsa-z923LK4zBo2bacvFa/9K2g@public.gmane.org>
To: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Cc: Thierry Reding
<thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Jonathan Hunter
<jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
Laxman Dewangan
<ldewangan-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>,
linux-i2c-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [PATCH v2 2/2] i2c: tegra: Synchronize DMA before termination
Date: Wed, 15 Apr 2020 18:31:24 +0200 [thread overview]
Message-ID: <20200415163123.GD2830@ninjato> (raw)
In-Reply-To: <20200324191217.1829-3-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
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On Tue, Mar 24, 2020 at 10:12:17PM +0300, Dmitry Osipenko wrote:
> DMA transfer could be completed, but CPU (which handles DMA interrupt)
> may get too busy and can't handle the interrupt in a timely manner,
> despite of DMA IRQ being raised. In this case the DMA state needs to
> synchronized before terminating DMA transfer in order not to miss the
> DMA transfer completion.
>
> Signed-off-by: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Applied to for-current, thanks!
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next prev parent reply other threads:[~2020-04-15 16:31 UTC|newest]
Thread overview: 123+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-24 19:12 [PATCH v2 0/2] NVIDIA Tegra I2C synchronization correction Dmitry Osipenko
2020-03-24 19:12 ` [PATCH v2 1/2] i2c: tegra: Better handle case where CPU0 is busy for a long time Dmitry Osipenko
2020-04-15 16:31 ` Wolfram Sang
2020-04-15 16:31 ` Wolfram Sang
2020-04-20 19:53 ` Jon Hunter
2020-04-20 19:53 ` Jon Hunter
2020-04-20 22:11 ` Dmitry Osipenko
2020-04-20 22:11 ` Dmitry Osipenko
2020-04-21 0:32 ` Dmitry Osipenko
2020-04-21 0:32 ` Dmitry Osipenko
2020-04-21 9:49 ` Jon Hunter
2020-04-21 9:49 ` Jon Hunter
2020-04-21 12:39 ` Manikanta Maddireddy
2020-04-21 12:39 ` Manikanta Maddireddy
2020-04-21 13:08 ` Jon Hunter
2020-04-21 13:08 ` Jon Hunter
2020-04-21 13:49 ` Manikanta Maddireddy
2020-04-21 13:49 ` Manikanta Maddireddy
2020-04-21 13:25 ` Dmitry Osipenko
2020-04-21 13:25 ` Dmitry Osipenko
2020-04-21 14:40 ` Jon Hunter
2020-04-21 14:40 ` Jon Hunter
2020-04-21 15:08 ` Dmitry Osipenko
2020-04-21 19:42 ` Jon Hunter
2020-04-21 19:42 ` Jon Hunter
2020-04-22 13:40 ` Dmitry Osipenko
2020-04-22 13:40 ` Dmitry Osipenko
2020-04-22 13:59 ` Jon Hunter
2020-04-22 13:59 ` Jon Hunter
2020-04-22 14:07 ` Dmitry Osipenko
2020-04-22 14:07 ` Dmitry Osipenko
2020-04-23 10:56 ` Jon Hunter
2020-04-23 10:56 ` Jon Hunter
2020-04-23 16:33 ` Dmitry Osipenko
2020-04-23 16:33 ` Dmitry Osipenko
2020-04-24 7:10 ` Jon Hunter
2020-04-24 7:10 ` Jon Hunter
2020-04-24 14:45 ` Dmitry Osipenko
2020-04-24 14:45 ` Dmitry Osipenko
2020-04-24 15:19 ` Jon Hunter
2020-04-24 15:19 ` Jon Hunter
2020-04-27 7:48 ` Thierry Reding
2020-04-27 7:48 ` Thierry Reding
2020-04-27 8:44 ` Wolfram Sang
2020-04-27 8:44 ` Wolfram Sang
2020-04-27 9:07 ` Dmitry Osipenko
2020-04-27 9:07 ` Dmitry Osipenko
2020-04-27 10:35 ` Wolfram Sang
2020-04-27 10:50 ` Thierry Reding
2020-04-27 15:32 ` Thierry Reding
2020-04-27 15:32 ` Thierry Reding
2020-04-27 16:02 ` Dmitry Osipenko
2020-04-27 10:49 ` Thierry Reding
2020-04-27 10:49 ` Thierry Reding
2020-04-27 9:52 ` Dmitry Osipenko
2020-04-27 10:38 ` Wolfram Sang
2020-04-27 10:38 ` Wolfram Sang
2020-04-27 13:15 ` Dmitry Osipenko
2020-04-27 14:19 ` Thierry Reding
2020-04-27 15:31 ` Wolfram Sang
2020-04-27 15:31 ` Wolfram Sang
2020-05-02 14:40 ` Dmitry Osipenko
2020-05-02 14:40 ` Dmitry Osipenko
2020-05-02 14:43 ` Wolfram Sang
2020-05-02 14:43 ` Wolfram Sang
2020-05-04 15:42 ` Thierry Reding
2020-05-04 15:42 ` Thierry Reding
2020-05-04 20:55 ` Dmitry Osipenko
2020-05-04 20:55 ` Dmitry Osipenko
2020-04-27 11:00 ` Thierry Reding
2020-04-27 11:00 ` Thierry Reding
2020-04-27 14:21 ` Dmitry Osipenko
2020-04-27 14:21 ` Dmitry Osipenko
2020-04-27 15:12 ` Thierry Reding
2020-04-27 15:12 ` Thierry Reding
2020-04-27 15:18 ` Dmitry Osipenko
2020-04-28 8:01 ` Jon Hunter
2020-04-28 8:01 ` Jon Hunter
2020-04-28 12:37 ` Dmitry Osipenko
2020-04-28 12:37 ` Dmitry Osipenko
2020-04-29 8:14 ` Thierry Reding
2020-04-29 8:14 ` Thierry Reding
2020-04-29 8:55 ` Thierry Reding
2020-04-29 12:35 ` Dmitry Osipenko
2020-04-29 13:57 ` Jon Hunter
2020-04-29 13:57 ` Jon Hunter
2020-04-29 14:46 ` Dmitry Osipenko
2020-04-29 14:46 ` Dmitry Osipenko
2020-04-29 16:24 ` Thierry Reding
2020-04-29 16:24 ` Thierry Reding
2020-04-29 17:02 ` Dmitry Osipenko
2020-04-29 17:02 ` Dmitry Osipenko
2020-04-29 16:30 ` Thierry Reding
2020-04-29 16:54 ` Dmitry Osipenko
2020-04-29 16:54 ` Dmitry Osipenko
2020-04-29 17:34 ` Dmitry Osipenko
2020-04-29 17:34 ` Dmitry Osipenko
2020-04-27 12:46 ` Dmitry Osipenko
2020-04-27 12:46 ` Dmitry Osipenko
2020-04-27 14:13 ` Dmitry Osipenko
2020-04-27 14:13 ` Dmitry Osipenko
2020-04-27 14:45 ` Dmitry Osipenko
2020-04-27 14:45 ` Dmitry Osipenko
2020-04-27 15:38 ` Dmitry Osipenko
2020-04-27 15:38 ` Dmitry Osipenko
2020-04-28 8:02 ` Jon Hunter
2020-04-28 8:02 ` Jon Hunter
2020-04-28 23:12 ` Dmitry Osipenko
2020-04-28 23:12 ` Dmitry Osipenko
2020-04-21 15:18 ` Dmitry Osipenko
2020-04-21 15:34 ` Jon Hunter
2020-04-21 15:34 ` Jon Hunter
2020-04-21 19:07 ` Dmitry Osipenko
2020-04-21 19:07 ` Dmitry Osipenko
2020-04-28 13:43 ` Dmitry Osipenko
2020-03-24 19:12 ` [PATCH v2 2/2] i2c: tegra: Synchronize DMA before termination Dmitry Osipenko
2020-04-15 16:31 ` Wolfram Sang [this message]
2020-04-15 16:31 ` Wolfram Sang
2020-04-15 11:45 ` [PATCH v2 0/2] NVIDIA Tegra I2C synchronization correction Wolfram Sang
2020-04-15 14:14 ` Dmitry Osipenko
2020-04-15 14:14 ` Dmitry Osipenko
2020-04-15 16:23 ` Wolfram Sang
2020-04-15 16:23 ` Wolfram Sang
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