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From: Kishon Vijay Abraham I <kishon@ti.com>
To: Tom Joseph <tjoseph@cadence.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <amurray@thegoodpenguin.co.uk>
Cc: Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>
Subject: [PATCH v3 08/14] PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register
Date: Fri, 17 Apr 2020 18:27:47 +0530	[thread overview]
Message-ID: <20200417125753.13021-9-kishon@ti.com> (raw)
In-Reply-To: <20200417125753.13021-1-kishon@ti.com>

Commit 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe
controller") in order to update Vendor ID, directly wrote to
PCI_VENDOR_ID register. However PCI_VENDOR_ID in root port configuration
space is read-only register and writing to it will have no effect.
Use local management register to configure Vendor ID and Subsystem Vendor
ID.

Fixes: 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe controller")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 drivers/pci/controller/cadence/pcie-cadence-host.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c
index 7c220671e66f..c7dc7be0da40 100644
--- a/drivers/pci/controller/cadence/pcie-cadence-host.c
+++ b/drivers/pci/controller/cadence/pcie-cadence-host.c
@@ -70,6 +70,7 @@ static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc)
 {
 	struct cdns_pcie *pcie = &rc->pcie;
 	u32 value, ctrl;
+	u32 id;
 
 	/*
 	 * Set the root complex BAR configuration register:
@@ -89,8 +90,12 @@ static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc)
 	cdns_pcie_writel(pcie, CDNS_PCIE_LM_RC_BAR_CFG, value);
 
 	/* Set root port configuration space */
-	if (rc->vendor_id != 0xffff)
-		cdns_pcie_rp_writew(pcie, PCI_VENDOR_ID, rc->vendor_id);
+	if (rc->vendor_id != 0xffff) {
+		id = CDNS_PCIE_LM_ID_VENDOR(rc->vendor_id) |
+			CDNS_PCIE_LM_ID_SUBSYS(rc->vendor_id);
+		cdns_pcie_writel(pcie, CDNS_PCIE_LM_ID, id);
+	}
+
 	if (rc->device_id != 0xffff)
 		cdns_pcie_rp_writew(pcie, PCI_DEVICE_ID, rc->device_id);
 
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Kishon Vijay Abraham I <kishon@ti.com>
To: Tom Joseph <tjoseph@cadence.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Rob Herring <robh+dt@kernel.org>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Andrew Murray <amurray@thegoodpenguin.co.uk>
Cc: devicetree@vger.kernel.org, Arnd Bergmann <arnd@arndb.de>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH v3 08/14] PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register
Date: Fri, 17 Apr 2020 18:27:47 +0530	[thread overview]
Message-ID: <20200417125753.13021-9-kishon@ti.com> (raw)
In-Reply-To: <20200417125753.13021-1-kishon@ti.com>

Commit 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe
controller") in order to update Vendor ID, directly wrote to
PCI_VENDOR_ID register. However PCI_VENDOR_ID in root port configuration
space is read-only register and writing to it will have no effect.
Use local management register to configure Vendor ID and Subsystem Vendor
ID.

Fixes: 1b79c5284439 ("PCI: cadence: Add host driver for Cadence PCIe controller")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
---
 drivers/pci/controller/cadence/pcie-cadence-host.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/drivers/pci/controller/cadence/pcie-cadence-host.c b/drivers/pci/controller/cadence/pcie-cadence-host.c
index 7c220671e66f..c7dc7be0da40 100644
--- a/drivers/pci/controller/cadence/pcie-cadence-host.c
+++ b/drivers/pci/controller/cadence/pcie-cadence-host.c
@@ -70,6 +70,7 @@ static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc)
 {
 	struct cdns_pcie *pcie = &rc->pcie;
 	u32 value, ctrl;
+	u32 id;
 
 	/*
 	 * Set the root complex BAR configuration register:
@@ -89,8 +90,12 @@ static int cdns_pcie_host_init_root_port(struct cdns_pcie_rc *rc)
 	cdns_pcie_writel(pcie, CDNS_PCIE_LM_RC_BAR_CFG, value);
 
 	/* Set root port configuration space */
-	if (rc->vendor_id != 0xffff)
-		cdns_pcie_rp_writew(pcie, PCI_VENDOR_ID, rc->vendor_id);
+	if (rc->vendor_id != 0xffff) {
+		id = CDNS_PCIE_LM_ID_VENDOR(rc->vendor_id) |
+			CDNS_PCIE_LM_ID_SUBSYS(rc->vendor_id);
+		cdns_pcie_writel(pcie, CDNS_PCIE_LM_ID, id);
+	}
+
 	if (rc->device_id != 0xffff)
 		cdns_pcie_rp_writew(pcie, PCI_DEVICE_ID, rc->device_id);
 
-- 
2.17.1


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  parent reply	other threads:[~2020-04-17 12:58 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-17 12:57 [PATCH v3 00/14] Add PCIe support to TI's J721E SoC Kishon Vijay Abraham I
2020-04-17 12:57 ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 01/14] PCI: cadence: Fix cdns_pcie_{host|ep}_setup() error path Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 02/14] linux/kernel.h: Add PTR_ALIGN_DOWN macro Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 03/14] PCI: cadence: Add support to use custom read and write accessors Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 04/14] PCI: cadence: Add support to start link and verify link status Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 05/14] PCI: cadence: Add read/write accessors to perform only 32-bit accesses Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 06/14] PCI: cadence: Allow pci_host_bridge to have custom pci_ops Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 07/14] PCI: cadence: Add new *ops* for CPU addr fixup Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-17 12:57 ` Kishon Vijay Abraham I [this message]
2020-04-17 12:57   ` [PATCH v3 08/14] PCI: cadence: Fix updating Vendor ID and Subsystem Vendor ID register Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 09/14] PCI: cadence: Add MSI-X support to Endpoint driver Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-30  1:55   ` Rob Herring
2020-04-30  1:55     ` Rob Herring
2020-05-06  3:58     ` Kishon Vijay Abraham I
2020-05-06  3:58       ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 10/14] dt-bindings: PCI: Add host mode dt-bindings for TI's J721E SoC Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-30  2:11   ` Rob Herring
2020-04-30  2:11     ` Rob Herring
2020-04-17 12:57 ` [PATCH v3 11/14] dt-bindings: PCI: Add EP " Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-30  2:13   ` Rob Herring
2020-04-30  2:13     ` Rob Herring
2020-04-17 12:57 ` [PATCH v3 12/14] PCI: j721e: Add TI J721E PCIe driver Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-30  2:11   ` Rob Herring
2020-04-30  2:11     ` Rob Herring
2020-05-06  4:18     ` Kishon Vijay Abraham I
2020-05-06  4:18       ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 13/14] misc: pci_endpoint_test: Add J721E in pci_device_id table Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-17 12:57 ` [PATCH v3 14/14] MAINTAINERS: Add Kishon Vijay Abraham I for TI J721E SoC PCIe Kishon Vijay Abraham I
2020-04-17 12:57   ` Kishon Vijay Abraham I
2020-04-17 15:19   ` Joe Perches
2020-04-17 15:19     ` Joe Perches
2020-05-06  3:54     ` Kishon Vijay Abraham I
2020-05-06  3:54       ` Kishon Vijay Abraham I

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