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From: Sasha Levin <sashal@kernel.org>
To: Sasha Levin <sashal@kernel.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: stable@vger.kernel.org, Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH] agp/intel: Reinforce the barrier after GTT updates
Date: Tue, 21 Apr 2020 19:56:06 +0000	[thread overview]
Message-ID: <20200421195607.875B720747@mail.kernel.org> (raw)
In-Reply-To: <20200410083535.25464-1-chris@chris-wilson.co.uk>

Hi

[This is an automated email]

This commit has been processed because it contains a "Fixes:" tag
fixing commit: 983d308cb8f6 ("agp/intel: Serialise after GTT updates").

The bot has tested the following trees: v5.6.5, v5.5.18, v5.4.33, v4.19.116, v4.14.176, v4.9.219, v4.4.219.

v5.6.5: Build OK!
v5.5.18: Build OK!
v5.4.33: Build OK!
v4.19.116: Build OK!
v4.14.176: Build OK!
v4.9.219: Build OK!
v4.4.219: Failed to apply! Possible dependencies:
    09cfcb456941 ("drm/i915: Split out load time HW initialization")
    0a9d2bed5557 ("drm/i915/skl: Making DC6 entry is the last call in suspend flow.")
    1f814daca43a ("drm/i915: add support for checking if we hold an RPM reference")
    2f693e28b8df ("drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini sequences")
    399bb5b6db02 ("drm/i915: Move allocation of various workqueues earlier during init")
    414b7999b8be ("drm/i915/gen9: Remove csr.state, csr_lock and related code.")
    5bab6f60cb4d ("drm/i915: Serialise updates to GGTT with access through GGTT on Braswell")
    62106b4f6b91 ("drm/i915: Rename dev_priv->gtt to dev_priv->ggtt")
    73dfc227ff5c ("drm/i915/skl: init/uninit display core as part of the HW power domain state")
    9c5308ea1cd4 ("drm/i915/skl: Refuse to load outdated dmc firmware")
    ad5c3d3ffbb2 ("drm/i915: Move MCHBAR setup earlier during init")
    b6e7d894c3d2 ("drm/i915/skl: Store and print the DMC firmware version we load")
    bc87229f323e ("drm/i915/skl: enable PC9/10 power states during suspend-to-idle")
    c140330b5e6b ("drm/i915: Move Braswell stop_machine GGTT insertion workaround")
    c73666f394fc ("drm/i915/skl: If needed sanitize bios programmed cdclk")
    d507d73578ef ("drm/i915/gtt: Clean up GGTT probing code")
    d6473f566417 ("drm/i915: Add support for mapping an object page by page")
    ebae38d061df ("drm/i915/gen9: csr_init after runtime pm enable")
    f4448375467d ("drm/i915/gen9: Use dev_priv in csr functions")
    f514c2d84285 ("drm/i915/gen9: flush DMC fw loading work during system suspend")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

-- 
Thanks
Sasha
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Sasha Levin <sashal@kernel.org>
To: Sasha Levin <sashal@kernel.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>, stable@vger.kernel.org
Cc: stable@vger.kernel.org
Subject: Re: [PATCH] agp/intel: Reinforce the barrier after GTT updates
Date: Tue, 21 Apr 2020 19:56:06 +0000	[thread overview]
Message-ID: <20200421195607.875B720747@mail.kernel.org> (raw)
In-Reply-To: <20200410083535.25464-1-chris@chris-wilson.co.uk>

Hi

[This is an automated email]

This commit has been processed because it contains a "Fixes:" tag
fixing commit: 983d308cb8f6 ("agp/intel: Serialise after GTT updates").

The bot has tested the following trees: v5.6.5, v5.5.18, v5.4.33, v4.19.116, v4.14.176, v4.9.219, v4.4.219.

v5.6.5: Build OK!
v5.5.18: Build OK!
v5.4.33: Build OK!
v4.19.116: Build OK!
v4.14.176: Build OK!
v4.9.219: Build OK!
v4.4.219: Failed to apply! Possible dependencies:
    09cfcb456941 ("drm/i915: Split out load time HW initialization")
    0a9d2bed5557 ("drm/i915/skl: Making DC6 entry is the last call in suspend flow.")
    1f814daca43a ("drm/i915: add support for checking if we hold an RPM reference")
    2f693e28b8df ("drm/i915: Make turning on/off PW1 and Misc I/O part of the init/fini sequences")
    399bb5b6db02 ("drm/i915: Move allocation of various workqueues earlier during init")
    414b7999b8be ("drm/i915/gen9: Remove csr.state, csr_lock and related code.")
    5bab6f60cb4d ("drm/i915: Serialise updates to GGTT with access through GGTT on Braswell")
    62106b4f6b91 ("drm/i915: Rename dev_priv->gtt to dev_priv->ggtt")
    73dfc227ff5c ("drm/i915/skl: init/uninit display core as part of the HW power domain state")
    9c5308ea1cd4 ("drm/i915/skl: Refuse to load outdated dmc firmware")
    ad5c3d3ffbb2 ("drm/i915: Move MCHBAR setup earlier during init")
    b6e7d894c3d2 ("drm/i915/skl: Store and print the DMC firmware version we load")
    bc87229f323e ("drm/i915/skl: enable PC9/10 power states during suspend-to-idle")
    c140330b5e6b ("drm/i915: Move Braswell stop_machine GGTT insertion workaround")
    c73666f394fc ("drm/i915/skl: If needed sanitize bios programmed cdclk")
    d507d73578ef ("drm/i915/gtt: Clean up GGTT probing code")
    d6473f566417 ("drm/i915: Add support for mapping an object page by page")
    ebae38d061df ("drm/i915/gen9: csr_init after runtime pm enable")
    f4448375467d ("drm/i915/gen9: Use dev_priv in csr functions")
    f514c2d84285 ("drm/i915/gen9: flush DMC fw loading work during system suspend")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

-- 
Thanks
Sasha

  parent reply	other threads:[~2020-04-21 19:56 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-10  8:33 [Intel-gfx] [PATCH] agp/intel: Reinforce the barrier after GTT updates Chris Wilson
2020-04-10  8:33 ` Chris Wilson
2020-04-10  8:35 ` [Intel-gfx] " Chris Wilson
2020-04-10  8:35   ` Chris Wilson
2020-04-10 13:47   ` [Intel-gfx] " Andi Shyti
2020-04-10 13:47     ` Andi Shyti
2020-04-21 19:56   ` Sasha Levin [this message]
2020-04-21 19:56     ` Sasha Levin
2020-04-10  9:54 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for agp/intel: Reinforce the barrier after GTT updates (rev2) Patchwork
2020-04-10 10:17 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-10 14:29 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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