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From: Christoph Hellwig <hch@lst.de>
To: Keith Busch <kbusch@kernel.org>
Cc: hch@lst.de, linux-nvme@lists.infradead.org, sagi@grimberg.me
Subject: Re: [PATCH 3/3] nvme-pci: reshuffle nvme_queue members
Date: Fri, 1 May 2020 14:57:04 +0200	[thread overview]
Message-ID: <20200501125704.GC5197@lst.de> (raw)
In-Reply-To: <20200427235243.2268765-3-kbusch@kernel.org>

On Mon, Apr 27, 2020 at 04:52:43PM -0700, Keith Busch wrote:
> All the io path hot members can fit within the first 64-bytes, which is
> a common cacheline. Order the members of this struct so those members
> fit in and align to that window.

Do we even want to share a cacheline for the submission vs completion
path?  I know other places try to keep the deliberately separate.

> +	/* only used for poll queues: */
> +	spinlock_t cq_poll_lock;
> +	dma_addr_t sq_dma_addr;
> +	dma_addr_t cq_dma_addr;
>  	struct completion delete_done;

We probably want a comment before the last three that this is only
used during queue deletion.  Also cq_poll_lock very much is in the
hot path for polled I/O, so I'd rather keep it with other CQ bits.

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  reply	other threads:[~2020-05-01 12:57 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-27 23:52 [PATCH 1/3] nvme-pci: clear shadow doorbell memory on resets Keith Busch
2020-04-27 23:52 ` [PATCH 2/3] nvme-pci: remove cached shadow doorbell offsets Keith Busch
2020-04-30  6:36   ` Dongli Zhang
2020-04-30 19:07     ` Keith Busch
2020-05-01 12:54   ` Christoph Hellwig
2021-10-04  9:42   ` John Levon
2020-04-27 23:52 ` [PATCH 3/3] nvme-pci: reshuffle nvme_queue members Keith Busch
2020-05-01 12:57   ` Christoph Hellwig [this message]
2020-05-01 15:08     ` Keith Busch
2020-05-01 15:12       ` Christoph Hellwig
2020-05-01 15:23         ` Keith Busch
2020-05-04 18:18       ` Keith Busch
2020-05-01 12:49 ` [PATCH 1/3] nvme-pci: clear shadow doorbell memory on resets Christoph Hellwig
2021-10-04  9:35 ` John Levon
2021-10-06 12:07   ` Keith Busch
2021-10-06 16:05     ` John Levon

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