回复: Regarding power control

回复: Regarding power control

[zhouyuanqing8]

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Hi Patrick Williams，

     My board hardware is connected to CPLD through I2C of AST2500, BMC reads and writes CPLD register through I2C, and then CPLD controls power on and off.

    So, I think The x86-power-control implementation cannot be directly adapted to my board.

     Please help me to suggest what to do next, which can solve this problem and adapt well to the code of openbmc community.

Thanks
Harley
________________________________
发件人: Patrick Williams
已发送: 2020 年 4 月 30 日 星期四 0:04
收件人: zhouyuanqing8@outlook.com
抄送: openbmc; uperic@163.com
主题: Re: Regarding power control

On Wed, Apr 29, 2020 at 01:50:09PM +0000, zhouyuanqing8@outlook.com wrote:

> Regarding power control, I read the codes in the following two directories(github.com/openbmc/x86-power-control.git & github.com/openbmc/skeleton/tree/master/op-pwrctl). The power control is controlled by GPIO, but the power of my board is controlled by CPLD.

The x86-power-control implementation uses GPIOs from the BMC, but those
GPIOs are wired to a CPLD for the signalling.  The CPLD monitors the
GPIOs to know when to begin the power sequence.  This is what we use on
Tiogapass.

--
Patrick Williams

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Re: 回复: Regarding power control

[Patrick Williams]

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Jason,

Can you give some suggestion on if this is something where
x86-power-control should be modified to support?


On Thu, Apr 30, 2020 at 01:58:58AM +0000, zhouyuanqing8@outlook.com wrote:
> Hi Patrick Williams，
> 
>      My board hardware is connected to CPLD through I2C of AST2500, BMC reads and writes CPLD register through I2C, and then CPLD controls power on and off.
> 
>     So, I think The x86-power-control implementation cannot be directly adapted to my board.
> 
>      Please help me to suggest what to do next, which can solve this problem and adapt well to the code of openbmc community.
> 
> Thanks
> Harley
> ________________________________
> 发件人: Patrick Williams
> 已发送: 2020 年 4 月 30 日 星期四 0:04
> 收件人: zhouyuanqing8@outlook.com
> 抄送: openbmc; uperic@163.com
> 主题: Re: Regarding power control
> 
> On Wed, Apr 29, 2020 at 01:50:09PM +0000, zhouyuanqing8@outlook.com wrote:
> 
> > Regarding power control, I read the codes in the following two directories(github.com/openbmc/x86-power-control.git & github.com/openbmc/skeleton/tree/master/op-pwrctl). The power control is controlled by GPIO, but the power of my board is controlled by CPLD.
> 
> The x86-power-control implementation uses GPIOs from the BMC, but those
> GPIOs are wired to a CPLD for the signalling.  The CPLD monitors the
> GPIOs to know when to begin the power sequence.  This is what we use on
> Tiogapass.
> 
> --
> Patrick Williams

-- 
Patrick Williams

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Re: 回复: Regarding power control

[Bills, Jason M]

On 5/4/2020 9:00 AM, Patrick Williams wrote:
> Jason,
> 
> Can you give some suggestion on if this is something where
> x86-power-control should be modified to support?
x86-power-control was created mainly because of the tight timing 
requirements around the GPIOs to track host power state.  It could be 
adapted, but may not make sense if the GPIO layout isn't the same.

phosphor-state-manager 
(https://github.com/openbmc/phosphor-state-manager) is the OpenBMC 
community power state manager.  It is designed for flexibility in how 
different systems change power state, so I believe it is probably better 
suited to adapt to this configuration.

> 
> 
> On Thu, Apr 30, 2020 at 01:58:58AM +0000, zhouyuanqing8@outlook.com wrote:
>> Hi Patrick Williams，
>>
>>       My board hardware is connected to CPLD through I2C of AST2500, BMC reads and writes CPLD register through I2C, and then CPLD controls power on and off.
>>
>>      So, I think The x86-power-control implementation cannot be directly adapted to my board.
>>
>>       Please help me to suggest what to do next, which can solve this problem and adapt well to the code of openbmc community.
>>
>> Thanks
>> Harley
>> ________________________________
>> 发件人: Patrick Williams
>> 已发送: 2020 年 4 月 30 日 星期四 0:04
>> 收件人: zhouyuanqing8@outlook.com
>> 抄送: openbmc; uperic@163.com
>> 主题: Re: Regarding power control
>>
>> On Wed, Apr 29, 2020 at 01:50:09PM +0000, zhouyuanqing8@outlook.com wrote:
>>
>>> Regarding power control, I read the codes in the following two directories(github.com/openbmc/x86-power-control.git & github.com/openbmc/skeleton/tree/master/op-pwrctl). The power control is controlled by GPIO, but the power of my board is controlled by CPLD.
>>
>> The x86-power-control implementation uses GPIOs from the BMC, but those
>> GPIOs are wired to a CPLD for the signalling.  The CPLD monitors the
>> GPIOs to know when to begin the power sequence.  This is what we use on
>> Tiogapass.
>>
>> --
>> Patrick Williams
>