From: Tony Lindgren <tony@atomide.com>
To: Tero Kristo <t-kristo@ti.com>
Cc: linux-omap@vger.kernel.org, "Andrew F . Davis" <afd@ti.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Suman Anna <s-anna@ti.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Rob Herring <robh@kernel.org>,
devicetree@vger.kernel.org
Subject: Re: [PATCH 2/6] soc: ti: omap-prm: Add basic power domain support
Date: Thu, 14 May 2020 08:18:19 -0700 [thread overview]
Message-ID: <20200514151819.GO37466@atomide.com> (raw)
In-Reply-To: <acb3960a-fbbb-f764-9ee2-191aac2f8323@ti.com>
* Tero Kristo <t-kristo@ti.com> [200514 08:05]:
> On 12/05/2020 23:38, Tony Lindgren wrote:
> > +struct omap_prm_domain {
> > + struct device *dev;
> > + struct omap_prm *prm;
> > + struct generic_pm_domain pd;
> > + void __iomem *pwrstctrl;
> > + void __iomem *pwrstst;
>
> I think the pwrstst is not really used as of now, it is just part of couple
> of dev_dbg prints.
Yes to me it seems the pwrstst only changes later on.
> > +static int omap_prm_domain_power_on(struct generic_pm_domain *domain)
> > +{
> > + struct omap_prm_domain *prmd;
> > + u32 v;
> > +
> > + prmd = genpd_to_prm_domain(domain);
> > + if (!prmd->cap)
> > + return 0;
> > +
> > + dev_dbg(prmd->dev, "%s: %s: old state: pwrstctrl: %08x pwrstst: %08x\n",
> > + __func__, prmd->pd.name, readl_relaxed(prmd->pwrstctrl),
> > + readl_relaxed(prmd->pwrstst));
> > +
> > + if (prmd->pwrstctrl_saved)
> > + v = prmd->pwrstctrl_saved;
> > + else
> > + v = readl_relaxed(prmd->pwrstctrl);
> > +
> > + writel_relaxed(v | OMAP_PRMD_ON_ACTIVE, prmd->pwrstctrl);
> > + dev_dbg(prmd->dev, "%s: %s: new state pwrstctrl: %08x\n",
> > + __func__, prmd->pd.name, readl_relaxed(prmd->pwrstctrl));
>
> Should we wait for the transition to complete here?
Good idea :)
> > + v &= ~PRM_POWERSTATE_MASK;
> > + v |= omap_prm_domain_find_lowest(prmd);
> > +
> > + if (prmd->cap->statechange)
> > + v |= PRM_LOWPOWERSTATECHANGE;
> > + if (prmd->cap->logicretstate)
> > + v &= ~PRM_LOGICRETSTATE;
> > + else
> > + v |= PRM_LOGICRETSTATE;
> > +
> > + writel_relaxed(v, prmd->pwrstctrl);
>
> Should we wait for the transition to complete here?
Would be nice yeah.
> Is any of the following clock handling needed, and if yes, whats its
> purpose?
>
> It looks like this is only used for ABE clkctrl handling on omap4/omap5 (at
> least for now), but afaik, ABE clkctrl is read only so this code would
> effectively do nothing (and potentially just even fail.)
Yeah this seems unnecessary, let's plan on leaving it out. I think the
clocks in the l4_abe dst changes are actually handled by simple-pm-bus,
not this driver, I was just confused :)
Regards,
Tony
WARNING: multiple messages have this Message-ID (diff)
From: Tony Lindgren <tony@atomide.com>
To: Tero Kristo <t-kristo@ti.com>
Cc: Rob Herring <robh@kernel.org>,
linux-omap@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, "Andrew F . Davis" <afd@ti.com>,
Santosh Shilimkar <ssantosh@kernel.org>,
Suman Anna <s-anna@ti.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/6] soc: ti: omap-prm: Add basic power domain support
Date: Thu, 14 May 2020 08:18:19 -0700 [thread overview]
Message-ID: <20200514151819.GO37466@atomide.com> (raw)
In-Reply-To: <acb3960a-fbbb-f764-9ee2-191aac2f8323@ti.com>
* Tero Kristo <t-kristo@ti.com> [200514 08:05]:
> On 12/05/2020 23:38, Tony Lindgren wrote:
> > +struct omap_prm_domain {
> > + struct device *dev;
> > + struct omap_prm *prm;
> > + struct generic_pm_domain pd;
> > + void __iomem *pwrstctrl;
> > + void __iomem *pwrstst;
>
> I think the pwrstst is not really used as of now, it is just part of couple
> of dev_dbg prints.
Yes to me it seems the pwrstst only changes later on.
> > +static int omap_prm_domain_power_on(struct generic_pm_domain *domain)
> > +{
> > + struct omap_prm_domain *prmd;
> > + u32 v;
> > +
> > + prmd = genpd_to_prm_domain(domain);
> > + if (!prmd->cap)
> > + return 0;
> > +
> > + dev_dbg(prmd->dev, "%s: %s: old state: pwrstctrl: %08x pwrstst: %08x\n",
> > + __func__, prmd->pd.name, readl_relaxed(prmd->pwrstctrl),
> > + readl_relaxed(prmd->pwrstst));
> > +
> > + if (prmd->pwrstctrl_saved)
> > + v = prmd->pwrstctrl_saved;
> > + else
> > + v = readl_relaxed(prmd->pwrstctrl);
> > +
> > + writel_relaxed(v | OMAP_PRMD_ON_ACTIVE, prmd->pwrstctrl);
> > + dev_dbg(prmd->dev, "%s: %s: new state pwrstctrl: %08x\n",
> > + __func__, prmd->pd.name, readl_relaxed(prmd->pwrstctrl));
>
> Should we wait for the transition to complete here?
Good idea :)
> > + v &= ~PRM_POWERSTATE_MASK;
> > + v |= omap_prm_domain_find_lowest(prmd);
> > +
> > + if (prmd->cap->statechange)
> > + v |= PRM_LOWPOWERSTATECHANGE;
> > + if (prmd->cap->logicretstate)
> > + v &= ~PRM_LOGICRETSTATE;
> > + else
> > + v |= PRM_LOGICRETSTATE;
> > +
> > + writel_relaxed(v, prmd->pwrstctrl);
>
> Should we wait for the transition to complete here?
Would be nice yeah.
> Is any of the following clock handling needed, and if yes, whats its
> purpose?
>
> It looks like this is only used for ABE clkctrl handling on omap4/omap5 (at
> least for now), but afaik, ABE clkctrl is read only so this code would
> effectively do nothing (and potentially just even fail.)
Yeah this seems unnecessary, let's plan on leaving it out. I think the
clocks in the l4_abe dst changes are actually handled by simple-pm-bus,
not this driver, I was just confused :)
Regards,
Tony
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next prev parent reply other threads:[~2020-05-14 15:18 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-12 20:38 [PATCH 0/6] Add initial genpd support for omap PRM driver Tony Lindgren
2020-05-12 20:38 ` Tony Lindgren
2020-05-12 20:38 ` [PATCH 1/6] dt-bindings: omap: Update PRM binding for genpd Tony Lindgren
2020-05-12 20:38 ` Tony Lindgren
2020-05-14 7:39 ` Tero Kristo
2020-05-14 7:39 ` Tero Kristo
2020-05-14 15:09 ` Tony Lindgren
2020-05-14 15:09 ` Tony Lindgren
2020-05-12 20:38 ` [PATCH 2/6] soc: ti: omap-prm: Add basic power domain support Tony Lindgren
2020-05-12 20:38 ` Tony Lindgren
2020-05-14 8:04 ` Tero Kristo
2020-05-14 8:04 ` Tero Kristo
2020-05-14 15:18 ` Tony Lindgren [this message]
2020-05-14 15:18 ` Tony Lindgren
2020-05-12 20:38 ` [PATCH 3/6] soc: ti: omap-prm: Configure sgx power domain for am3 and am4 Tony Lindgren
2020-05-12 20:38 ` Tony Lindgren
2020-05-12 20:38 ` [PATCH 4/6] soc: ti: omap-prm: Configure omap4 and 5 l4_abe power domain Tony Lindgren
2020-05-12 20:38 ` Tony Lindgren
2020-05-12 20:38 ` [PATCH 5/6] ARM: dts: Configure am3 and am4 sgx for genpd and drop platform data Tony Lindgren
2020-05-12 20:38 ` Tony Lindgren
2020-05-12 20:38 ` [PATCH 6/6] ARM: dts: Configure omap4 and 5 l4_abe " Tony Lindgren
2020-05-12 20:38 ` Tony Lindgren
-- strict thread matches above, loose matches on Subject: below --
2020-05-20 21:13 [PATCHv2 0/6] Add initial genpd support for omap PRM driver Tony Lindgren
2020-05-20 21:13 ` [PATCH 2/6] soc: ti: omap-prm: Add basic power domain support Tony Lindgren
2020-05-20 21:13 ` Tony Lindgren
2020-05-21 4:53 ` kbuild test robot
2020-05-21 4:53 ` kbuild test robot
2020-05-21 4:53 ` kbuild test robot
2020-06-22 16:46 [PATCHv3 0/6] Add initial genpd support for omap PRM driver Tony Lindgren
2020-06-22 16:46 ` [PATCH 2/6] soc: ti: omap-prm: Add basic power domain support Tony Lindgren
2020-07-02 15:45 [PATCHv4 0/6] Add initial genpd support for omap PRM driver Tony Lindgren
2020-07-02 15:45 ` [PATCH 2/6] soc: ti: omap-prm: Add basic power domain support Tony Lindgren
2020-07-02 15:45 ` Tony Lindgren
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