From: Rob Herring <robh@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Jason Cooper <jason@lakedaemon.net>
Subject: [PATCH 02/15] PCI: mvebu: Use struct pci_host_bridge.windows list directly
Date: Fri, 22 May 2020 17:48:19 -0600 [thread overview]
Message-ID: <20200522234832.954484-3-robh@kernel.org> (raw)
In-Reply-To: <20200522234832.954484-1-robh@kernel.org>
There's no need to create a temporary resource list and then splice it to
struct pci_host_bridge.windows list. Just use pci_host_bridge.windows
directly. The necessary clean-up is already handled by the PCI core.
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Rob Herring <robh@kernel.org>
---
drivers/pci/controller/pci-mvebu.c | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 153a64676bc9..801044523a3d 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -71,7 +71,6 @@ struct mvebu_pcie {
struct platform_device *pdev;
struct mvebu_pcie_port *ports;
struct msi_controller *msi;
- struct list_head resources;
struct resource io;
struct resource realio;
struct resource mem;
@@ -961,17 +960,16 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie)
{
struct device *dev = &pcie->pdev->dev;
struct device_node *np = dev->of_node;
+ struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
int ret;
- INIT_LIST_HEAD(&pcie->resources);
-
/* Get the bus range */
ret = of_pci_parse_bus_range(np, &pcie->busn);
if (ret) {
dev_err(dev, "failed to parse bus-range property: %d\n", ret);
return ret;
}
- pci_add_resource(&pcie->resources, &pcie->busn);
+ pci_add_resource(&bridge->windows, &pcie->busn);
/* Get the PCIe memory aperture */
mvebu_mbus_get_pcie_mem_aperture(&pcie->mem);
@@ -981,7 +979,7 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie)
}
pcie->mem.name = "PCI MEM";
- pci_add_resource(&pcie->resources, &pcie->mem);
+ pci_add_resource(&bridge->windows, &pcie->mem);
/* Get the PCIe IO aperture */
mvebu_mbus_get_pcie_io_aperture(&pcie->io);
@@ -994,10 +992,10 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie)
resource_size(&pcie->io) - 1);
pcie->realio.name = "PCI I/O";
- pci_add_resource(&pcie->resources, &pcie->realio);
+ pci_add_resource(&bridge->windows, &pcie->realio);
}
- return devm_request_pci_bus_resources(dev, &pcie->resources);
+ return devm_request_pci_bus_resources(dev, &bridge->windows);
}
/*
@@ -1118,7 +1116,6 @@ static int mvebu_pcie_probe(struct platform_device *pdev)
pcie->nports = i;
- list_splice_init(&pcie->resources, &bridge->windows);
bridge->dev.parent = dev;
bridge->sysdata = pcie;
bridge->busnr = 0;
--
2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>,
linux-pci@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-arm-kernel@lists.infradead.org,
Jason Cooper <jason@lakedaemon.net>
Subject: [PATCH 02/15] PCI: mvebu: Use struct pci_host_bridge.windows list directly
Date: Fri, 22 May 2020 17:48:19 -0600 [thread overview]
Message-ID: <20200522234832.954484-3-robh@kernel.org> (raw)
In-Reply-To: <20200522234832.954484-1-robh@kernel.org>
There's no need to create a temporary resource list and then splice it to
struct pci_host_bridge.windows list. Just use pci_host_bridge.windows
directly. The necessary clean-up is already handled by the PCI core.
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Rob Herring <robh@kernel.org>
---
drivers/pci/controller/pci-mvebu.c | 13 +++++--------
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index 153a64676bc9..801044523a3d 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -71,7 +71,6 @@ struct mvebu_pcie {
struct platform_device *pdev;
struct mvebu_pcie_port *ports;
struct msi_controller *msi;
- struct list_head resources;
struct resource io;
struct resource realio;
struct resource mem;
@@ -961,17 +960,16 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie)
{
struct device *dev = &pcie->pdev->dev;
struct device_node *np = dev->of_node;
+ struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie);
int ret;
- INIT_LIST_HEAD(&pcie->resources);
-
/* Get the bus range */
ret = of_pci_parse_bus_range(np, &pcie->busn);
if (ret) {
dev_err(dev, "failed to parse bus-range property: %d\n", ret);
return ret;
}
- pci_add_resource(&pcie->resources, &pcie->busn);
+ pci_add_resource(&bridge->windows, &pcie->busn);
/* Get the PCIe memory aperture */
mvebu_mbus_get_pcie_mem_aperture(&pcie->mem);
@@ -981,7 +979,7 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie)
}
pcie->mem.name = "PCI MEM";
- pci_add_resource(&pcie->resources, &pcie->mem);
+ pci_add_resource(&bridge->windows, &pcie->mem);
/* Get the PCIe IO aperture */
mvebu_mbus_get_pcie_io_aperture(&pcie->io);
@@ -994,10 +992,10 @@ static int mvebu_pcie_parse_request_resources(struct mvebu_pcie *pcie)
resource_size(&pcie->io) - 1);
pcie->realio.name = "PCI I/O";
- pci_add_resource(&pcie->resources, &pcie->realio);
+ pci_add_resource(&bridge->windows, &pcie->realio);
}
- return devm_request_pci_bus_resources(dev, &pcie->resources);
+ return devm_request_pci_bus_resources(dev, &bridge->windows);
}
/*
@@ -1118,7 +1116,6 @@ static int mvebu_pcie_probe(struct platform_device *pdev)
pcie->nports = i;
- list_splice_init(&pcie->resources, &bridge->windows);
bridge->dev.parent = dev;
bridge->sysdata = pcie;
bridge->busnr = 0;
--
2.25.1
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next prev parent reply other threads:[~2020-05-22 23:48 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-22 23:48 [PATCH 00/15] PCI controller probe cleanups Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-22 23:48 ` [PATCH 01/15] PCI: cadence: Use struct pci_host_bridge.windows list directly Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-22 23:48 ` Rob Herring [this message]
2020-05-22 23:48 ` [PATCH 02/15] PCI: mvebu: " Rob Herring
2020-05-22 23:48 ` [PATCH 03/15] PCI: host-common: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-22 23:48 ` [PATCH 04/15] PCI: brcmstb: Use pci_host_probe() to register host Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-06-18 10:54 ` Nicolas Saenz Julienne
2020-06-18 10:54 ` Nicolas Saenz Julienne
2020-05-22 23:48 ` [PATCH 05/15] PCI: mobiveil: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-22 23:48 ` [PATCH 06/15] PCI: tegra: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-22 23:48 ` [PATCH 07/15] PCI: v3: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-25 11:38 ` Linus Walleij
2020-05-25 11:38 ` Linus Walleij
2020-05-22 23:48 ` [PATCH 08/15] PCI: versatile: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-22 23:48 ` [PATCH 09/15] PCI: xgene: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-22 23:48 ` [PATCH 10/15] PCI: altera: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-06-02 1:02 ` Tan, Ley Foon
2020-06-02 1:02 ` Tan, Ley Foon
2020-05-22 23:48 ` [PATCH 11/15] PCI: iproc: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-28 17:53 ` Scott Branden
2020-05-28 17:53 ` Scott Branden
2020-05-22 23:48 ` [PATCH 12/15] PCI: rcar: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-25 8:31 ` Geert Uytterhoeven
2020-05-25 8:31 ` Geert Uytterhoeven
2020-05-22 23:48 ` [PATCH 13/15] PCI: rockchip: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-22 23:48 ` [PATCH 14/15] PCI: xilinx-nwl: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-25 6:44 ` Michal Simek
2020-05-25 6:44 ` Michal Simek
2020-05-22 23:48 ` [PATCH 15/15] PCI: xilinx: " Rob Herring
2020-05-22 23:48 ` Rob Herring
2020-05-25 6:44 ` Michal Simek
2020-05-25 6:44 ` Michal Simek
2020-07-06 9:04 ` [PATCH 00/15] PCI controller probe cleanups Lorenzo Pieralisi
2020-07-06 9:04 ` Lorenzo Pieralisi
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