All of lore.kernel.org
 help / color / mirror / Atom feed
From: Sasha Levin <sashal@kernel.org>
To: Sasha Levin <sashal@kernel.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: stable@vger.kernel.org, Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH 1/4] drm/i915/gt: Do not schedule normal requests immediately along virtual
Date: Tue, 26 May 2020 00:23:57 +0000	[thread overview]
Message-ID: <20200526002357.EA7B620657@mail.kernel.org> (raw)
In-Reply-To: <20200525202901.32244-1-chris@chris-wilson.co.uk>

Hi

[This is an automated email]

This commit has been processed because it contains a "Fixes:" tag
fixing commit: 6d06779e8672 ("drm/i915: Load balancing across a virtual engine").

The bot has tested the following trees: v5.6.14, v5.4.42.

v5.6.14: Build OK!
v5.4.42: Failed to apply! Possible dependencies:
    0b718ba1e884 ("drm/i915/gtt: Downgrade Cherryview back to aliasing-ppgtt")
    0f100b70487a ("drm/i915: Push the use-semaphore marker onto the intel_context")
    2e0986a58cc4 ("drm/i915/gem: Cancel contexts when hangchecking is disabled")
    4a3174152147 ("drm/i915/gem: Refine occupancy test in kill_context()")
    5bf05dc58d65 ("drm/i915/tgl: Register state context definition for Gen12")
    7dc56af5260e ("drm/i915/selftests: Verify the LRC register layout between init and HW")
    8f8b1171e1a5 ("drm/i915/perf: Wean ourselves off dev_priv")
    9cd20ef7803c ("drm/i915/perf: allow holding preemption on filtered ctx")
    9f3ccd40acf4 ("drm/i915: Drop GEM context as a direct link from i915_request")
    a0e047156cde ("drm/i915/gem: Make context persistence optional")
    cdb736fa8b8b ("drm/i915: Use engine relative LRIs on context setup")
    eaef5b3c4113 ("drm/i915: Refactor instdone loops on new subslice functions")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

-- 
Thanks
Sasha
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Sasha Levin <sashal@kernel.org>
To: Sasha Levin <sashal@kernel.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
To: intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: stable@vger.kernel.org
Subject: Re: [PATCH 1/4] drm/i915/gt: Do not schedule normal requests immediately along virtual
Date: Tue, 26 May 2020 00:23:57 +0000	[thread overview]
Message-ID: <20200526002357.EA7B620657@mail.kernel.org> (raw)
In-Reply-To: <20200525202901.32244-1-chris@chris-wilson.co.uk>

Hi

[This is an automated email]

This commit has been processed because it contains a "Fixes:" tag
fixing commit: 6d06779e8672 ("drm/i915: Load balancing across a virtual engine").

The bot has tested the following trees: v5.6.14, v5.4.42.

v5.6.14: Build OK!
v5.4.42: Failed to apply! Possible dependencies:
    0b718ba1e884 ("drm/i915/gtt: Downgrade Cherryview back to aliasing-ppgtt")
    0f100b70487a ("drm/i915: Push the use-semaphore marker onto the intel_context")
    2e0986a58cc4 ("drm/i915/gem: Cancel contexts when hangchecking is disabled")
    4a3174152147 ("drm/i915/gem: Refine occupancy test in kill_context()")
    5bf05dc58d65 ("drm/i915/tgl: Register state context definition for Gen12")
    7dc56af5260e ("drm/i915/selftests: Verify the LRC register layout between init and HW")
    8f8b1171e1a5 ("drm/i915/perf: Wean ourselves off dev_priv")
    9cd20ef7803c ("drm/i915/perf: allow holding preemption on filtered ctx")
    9f3ccd40acf4 ("drm/i915: Drop GEM context as a direct link from i915_request")
    a0e047156cde ("drm/i915/gem: Make context persistence optional")
    cdb736fa8b8b ("drm/i915: Use engine relative LRIs on context setup")
    eaef5b3c4113 ("drm/i915: Refactor instdone loops on new subslice functions")


NOTE: The patch will not be queued to stable trees until it is upstream.

How should we proceed with this patch?

-- 
Thanks
Sasha

  parent reply	other threads:[~2020-05-26  0:24 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-25 20:28 [Intel-gfx] [PATCH 1/4] drm/i915/gt: Do not schedule normal requests immediately along virtual Chris Wilson
2020-05-25 20:28 ` Chris Wilson
2020-05-25 20:28 ` [Intel-gfx] [PATCH 2/4] drm/i915/gt: Use virtual_engine during execlists_dequeue Chris Wilson
2020-05-25 20:29 ` [Intel-gfx] [PATCH 3/4] drm/i915/gt: Decouple inflight virtual engines Chris Wilson
2020-05-25 20:29 ` [Intel-gfx] [PATCH 4/4] drm/i915/gt: Resubmit the virtual engine on schedule-out Chris Wilson
2020-05-25 21:06 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915/gt: Do not schedule normal requests immediately along virtual Patchwork
2020-05-25 23:41 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-05-26  0:23 ` Sasha Levin [this message]
2020-05-26  0:23   ` [PATCH 1/4] " Sasha Levin
2020-05-26  8:29 ` [Intel-gfx] " Tvrtko Ursulin
2020-05-26  8:29   ` Tvrtko Ursulin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200526002357.EA7B620657@mail.kernel.org \
    --to=sashal@kernel.org \
    --cc=chris@chris-wilson.co.uk \
    --cc=stable@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.