From: Boris Brezillon <boris.brezillon@collabora.com>
To: Bean Huo <huobean@gmail.com>
Cc: vigneshr@ti.com, Richard Weinberger <richard@nod.at>,
s.hauer@pengutronix.de, linux-kernel@vger.kernel.org,
derosier@gmail.com, linux-mtd@lists.infradead.org,
miquel.raynal@bootlin.com, Bean Huo <beanhuo@micron.com>
Subject: Re: [PATCH v6 0/5] Micron SLC NAND filling block
Date: Tue, 2 Jun 2020 13:53:38 +0200 [thread overview]
Message-ID: <20200602135338.7b66f395@collabora.com> (raw)
In-Reply-To: <aabedbd547708a52b8bf8e0d10ba10e994acb54f.camel@gmail.com>
On Tue, 02 Jun 2020 10:59:46 +0200
Bean Huo <huobean@gmail.com> wrote:
> On Tue, 2020-06-02 at 09:48 +0200, Boris Brezillon wrote:
> > Hi Bean,
> >
> > On Mon, 01 Jun 2020 23:10:43 +0200
> > Bean Huo <huobean@gmail.com> wrote:
> >
> > > Hi Richard
> > > would you please help us confirm below question??
> >
> > Miquel suggested an approach that would allow us to deal with both
> > JFFS2
> > and UBI/UBIFS without having any FS/wear-leveling specific code at
> > the
> > NAND level, but you decided to ignore his comments. Sorry but there's
> > nothing we can do to help you if you don't listen to our
> > recommendations.
>
> Expose this issue to FS layer, it is not good idea. that will impact
> more code, and involve duplicated code.
Sorry but as far as I'm concerned, you've lost the right to have your
word in such design choices a long time ago. You can't deliberately lie
to us for several weeks/months and expect us to trust you (your
judgment) after that.
Back to the actual proposal, it's something that came from a discussion
we had with Miquel and Richard. It's certainly not perfect, but neither
is the option of hardcoding a quirk for JFFS2/UBI/UBIFS in the Micron
NAND driver.
BTW, I think you completely occluded Miquel's suggestion to have a
generic implementation at the MTD level for users who don't care about
the pattern that's written to those 'soon-to-be-erased' blocks. See,
that's one of the things I'm complaining about. You seem to ignore
(don't know if it's deliberate or not) some of the suggestions we do.
> >
> > I've been quite disappointed by your behavior in the past, and it
>
> > continues. Recently you've taken Miquel's patches and claimed
> > ownership
> did you seem my recent patch? you can ignore that see this.
I don't understand what you mean here, sorry.
>
>
> > on them (probably not intentionally, but still) while you were
> > clearly
> > unable to rework your original series the way I suggested (which
> > Miquel
> > did after seeing you would never send new versions).
>
> seriously?
Yes, seriously!
>
> > And when Miquel
> > suggested a change to the implementation he had done based on the
> > discussion we had with Richard, you decided to ignore it and pursue
> > in
> > the original direction. So, quite frankly, I'm really not convinced
> > you
> > can conduct such a change.
> >
>
> As Miquel mentioned, we need richard's final comfirmation,
> If he agrees with this proposal, I give up my current patch.
>
Actually, you need more than Richard's blessing. Miquel has to agree on
the NAND changes, and even if I can't block the solution, I think I can
at least give my opinion: anything that involves FS/wear-leveling
specific code at the NAND level should be avoided. Given the discussion
we had regarding JFFS2 and the cleanmarkers, I don't think we can come
up with a solution that's safe for every users, hence the proposal to
empower users with this responsibility.
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
WARNING: multiple messages have this Message-ID (diff)
From: Boris Brezillon <boris.brezillon@collabora.com>
To: Bean Huo <huobean@gmail.com>
Cc: miquel.raynal@bootlin.com, vigneshr@ti.com,
s.hauer@pengutronix.de, derosier@gmail.com,
Richard Weinberger <richard@nod.at>,
linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org,
Bean Huo <beanhuo@micron.com>
Subject: Re: [PATCH v6 0/5] Micron SLC NAND filling block
Date: Tue, 2 Jun 2020 13:53:38 +0200 [thread overview]
Message-ID: <20200602135338.7b66f395@collabora.com> (raw)
In-Reply-To: <aabedbd547708a52b8bf8e0d10ba10e994acb54f.camel@gmail.com>
On Tue, 02 Jun 2020 10:59:46 +0200
Bean Huo <huobean@gmail.com> wrote:
> On Tue, 2020-06-02 at 09:48 +0200, Boris Brezillon wrote:
> > Hi Bean,
> >
> > On Mon, 01 Jun 2020 23:10:43 +0200
> > Bean Huo <huobean@gmail.com> wrote:
> >
> > > Hi Richard
> > > would you please help us confirm below question??
> >
> > Miquel suggested an approach that would allow us to deal with both
> > JFFS2
> > and UBI/UBIFS without having any FS/wear-leveling specific code at
> > the
> > NAND level, but you decided to ignore his comments. Sorry but there's
> > nothing we can do to help you if you don't listen to our
> > recommendations.
>
> Expose this issue to FS layer, it is not good idea. that will impact
> more code, and involve duplicated code.
Sorry but as far as I'm concerned, you've lost the right to have your
word in such design choices a long time ago. You can't deliberately lie
to us for several weeks/months and expect us to trust you (your
judgment) after that.
Back to the actual proposal, it's something that came from a discussion
we had with Miquel and Richard. It's certainly not perfect, but neither
is the option of hardcoding a quirk for JFFS2/UBI/UBIFS in the Micron
NAND driver.
BTW, I think you completely occluded Miquel's suggestion to have a
generic implementation at the MTD level for users who don't care about
the pattern that's written to those 'soon-to-be-erased' blocks. See,
that's one of the things I'm complaining about. You seem to ignore
(don't know if it's deliberate or not) some of the suggestions we do.
> >
> > I've been quite disappointed by your behavior in the past, and it
>
> > continues. Recently you've taken Miquel's patches and claimed
> > ownership
> did you seem my recent patch? you can ignore that see this.
I don't understand what you mean here, sorry.
>
>
> > on them (probably not intentionally, but still) while you were
> > clearly
> > unable to rework your original series the way I suggested (which
> > Miquel
> > did after seeing you would never send new versions).
>
> seriously?
Yes, seriously!
>
> > And when Miquel
> > suggested a change to the implementation he had done based on the
> > discussion we had with Richard, you decided to ignore it and pursue
> > in
> > the original direction. So, quite frankly, I'm really not convinced
> > you
> > can conduct such a change.
> >
>
> As Miquel mentioned, we need richard's final comfirmation,
> If he agrees with this proposal, I give up my current patch.
>
Actually, you need more than Richard's blessing. Miquel has to agree on
the NAND changes, and even if I can't block the solution, I think I can
at least give my opinion: anything that involves FS/wear-leveling
specific code at the NAND level should be avoided. Given the discussion
we had regarding JFFS2 and the cleanmarkers, I don't think we can come
up with a solution that's safe for every users, hence the proposal to
empower users with this responsibility.
next prev parent reply other threads:[~2020-06-02 11:53 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-25 12:18 [PATCH v6 0/5] Micron SLC NAND filling block Bean Huo
2020-05-25 12:18 ` Bean Huo
2020-05-25 12:18 ` [PATCH v6 1/5] mtd: rawnand: group all NAND specific ops into new nand_chip_ops Bean Huo
2020-05-25 12:18 ` Bean Huo
2020-05-25 12:18 ` [PATCH v6 2/5] mtd: rawnand: Add {pre, post}_erase hooks in nand_chip_ops Bean Huo
2020-05-25 12:18 ` Bean Huo
2020-05-25 12:18 ` [PATCH v6 3/5] mtd: rawnand: Add write_oob hook " Bean Huo
2020-05-25 12:18 ` Bean Huo
2020-05-25 12:18 ` [PATCH v6 4/5] mtd: rawnand: Introduce a new function nand_check_is_erased_page() Bean Huo
2020-05-25 12:18 ` Bean Huo
2020-05-25 12:18 ` [PATCH v6 5/5] mtd: rawnand: micron: Micron SLC NAND filling block Bean Huo
2020-05-25 12:18 ` Bean Huo
2020-05-28 14:14 ` [PATCH v6 0/5] " Bean Huo
2020-05-28 14:14 ` Bean Huo
2020-06-01 21:10 ` Bean Huo
2020-06-01 21:10 ` Bean Huo
2020-06-02 7:05 ` Miquel Raynal
2020-06-02 7:05 ` Miquel Raynal
2020-06-02 7:48 ` Boris Brezillon
2020-06-02 7:48 ` Boris Brezillon
2020-06-02 8:59 ` Bean Huo
2020-06-02 8:59 ` Bean Huo
2020-06-02 11:53 ` Boris Brezillon [this message]
2020-06-02 11:53 ` Boris Brezillon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200602135338.7b66f395@collabora.com \
--to=boris.brezillon@collabora.com \
--cc=beanhuo@micron.com \
--cc=derosier@gmail.com \
--cc=huobean@gmail.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-mtd@lists.infradead.org \
--cc=miquel.raynal@bootlin.com \
--cc=richard@nod.at \
--cc=s.hauer@pengutronix.de \
--cc=vigneshr@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.