From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: devicetree@vger.kernel.org, kernel@pengutronix.de,
netdev@vger.kernel.org, linux-kernel@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] net: ethernet: mvneta: add support for 2.5G DRSGMII mode
Date: Mon, 8 Jun 2020 17:08:01 +0100 [thread overview]
Message-ID: <20200608160801.GO1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <20200608074716.9975-1-s.hauer@pengutronix.de>
On Mon, Jun 08, 2020 at 09:47:16AM +0200, Sascha Hauer wrote:
> The Marvell MVNETA Ethernet controller supports a 2.5 Gbps SGMII mode
> called DRSGMII.
>
> This patch adds a corresponding phy-mode string 'drsgmii' and parses it
> from DT. The MVNETA then configures the SERDES protocol value
> accordingly.
>
> It was successfully tested on a MV78460 connected to a FPGA.
Digging around, this is Armada XP? Which SoCs is this mode supported?
There's no mention of DRSGMII in the A38x nor A37xx documentation which
are later than Armada XP.
What exactly is "drsgmii"? It can't be "double-rate" SGMII because that
would give you 2Gbps max instead of the 1Gbps, but this gives 2.5Gbps,
so I'm really not sure using "drsgmii" is a good idea. It may be what
Marvell call it, but we really need to know if there's some vendor
neutral way to refer to it.
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> .../devicetree/bindings/net/ethernet-controller.yaml | 1 +
> drivers/net/ethernet/marvell/mvneta.c | 7 ++++++-
> include/linux/phy.h | 3 +++
> 3 files changed, 10 insertions(+), 1 deletion(-)
>
> This patch has already been sent 3 years ago here:
> https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170123142206.5390-1-jlu@pengutronix.de/
> Since then the driver has evolved a lot. 2.5Gbps is properly configured in the
> MAC now.
Nevertheless, adding a new interface mode needs properly documenting to
describe exactly what it is - see Documentation/networking/phy.rst, the
section "PHY interface modes". The above point about "what is this"
illustrates why we need these documented.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC for 0.8m (est. 1762m) line in suburbia: sync at 13.1Mbps down 424kbps up
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WARNING: multiple messages have this Message-ID (diff)
From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Sascha Hauer <s.hauer@pengutronix.de>
Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org,
kernel@pengutronix.de, linux-kernel@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] net: ethernet: mvneta: add support for 2.5G DRSGMII mode
Date: Mon, 8 Jun 2020 17:08:01 +0100 [thread overview]
Message-ID: <20200608160801.GO1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <20200608074716.9975-1-s.hauer@pengutronix.de>
On Mon, Jun 08, 2020 at 09:47:16AM +0200, Sascha Hauer wrote:
> The Marvell MVNETA Ethernet controller supports a 2.5 Gbps SGMII mode
> called DRSGMII.
>
> This patch adds a corresponding phy-mode string 'drsgmii' and parses it
> from DT. The MVNETA then configures the SERDES protocol value
> accordingly.
>
> It was successfully tested on a MV78460 connected to a FPGA.
Digging around, this is Armada XP? Which SoCs is this mode supported?
There's no mention of DRSGMII in the A38x nor A37xx documentation which
are later than Armada XP.
What exactly is "drsgmii"? It can't be "double-rate" SGMII because that
would give you 2Gbps max instead of the 1Gbps, but this gives 2.5Gbps,
so I'm really not sure using "drsgmii" is a good idea. It may be what
Marvell call it, but we really need to know if there's some vendor
neutral way to refer to it.
> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> ---
> .../devicetree/bindings/net/ethernet-controller.yaml | 1 +
> drivers/net/ethernet/marvell/mvneta.c | 7 ++++++-
> include/linux/phy.h | 3 +++
> 3 files changed, 10 insertions(+), 1 deletion(-)
>
> This patch has already been sent 3 years ago here:
> https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170123142206.5390-1-jlu@pengutronix.de/
> Since then the driver has evolved a lot. 2.5Gbps is properly configured in the
> MAC now.
Nevertheless, adding a new interface mode needs properly documenting to
describe exactly what it is - see Documentation/networking/phy.rst, the
section "PHY interface modes". The above point about "what is this"
illustrates why we need these documented.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC for 0.8m (est. 1762m) line in suburbia: sync at 13.1Mbps down 424kbps up
next prev parent reply other threads:[~2020-06-08 16:08 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-08 7:47 [PATCH] net: ethernet: mvneta: add support for 2.5G DRSGMII mode Sascha Hauer
2020-06-08 7:47 ` Sascha Hauer
2020-06-08 14:57 ` Andrew Lunn
2020-06-08 14:57 ` Andrew Lunn
2020-06-09 12:55 ` Sascha Hauer
2020-06-09 12:55 ` Sascha Hauer
2020-06-09 13:12 ` Andrew Lunn
2020-06-09 13:12 ` Andrew Lunn
2020-06-09 13:14 ` Sascha Hauer
2020-06-09 13:14 ` Sascha Hauer
2020-06-08 16:08 ` Russell King - ARM Linux admin [this message]
2020-06-08 16:08 ` Russell King - ARM Linux admin
2020-06-09 12:11 ` Sascha Hauer
2020-06-09 12:11 ` Sascha Hauer
-- strict thread matches above, loose matches on Subject: below --
2017-01-23 14:22 Jan Luebbe
2017-01-23 18:18 ` Andrew Lunn
[not found] ` <20170123181836.GO10895-g2DYL2Zd6BY@public.gmane.org>
2017-01-24 8:34 ` Jan Lübbe
2017-01-24 13:19 ` Andrew Lunn
[not found] ` <20170123142206.5390-1-jlu-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2017-01-25 17:38 ` David Miller
[not found] ` <20170125.123806.790914338952471404.davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org>
2017-01-26 8:17 ` Jan Lübbe
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