From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: "Shmuel H." <sh@tkos.co.il>
Cc: "Jason Cooper" <jason@lakedaemon.net>,
"Marek Behún" <marek.behun@nic.cz>,
"Baruch Siach" <baruch@tkos.co.il>,
"Chris ackham" <chris.packham@alliedtelesis.co.nz>,
linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH] pci: pci-mvebu: setup BAR0 to internal-regs
Date: Wed, 10 Jun 2020 21:20:37 +0200 [thread overview]
Message-ID: <20200610212037.7fd32a43@windsurf.home> (raw)
In-Reply-To: <ae84b87c-665b-7619-7cb0-a1fd58b17d8f@tkos.co.il>
On Wed, 10 Jun 2020 17:17:15 +0300
"Shmuel H." <sh@tkos.co.il> wrote:
> Apparently, the PCIe controller is outside of the internal registers space.
No, it is not.
It is outside of the internal-regs node in the DT because it needs more
"ranges" properties, but the PCIe controller registers *are* within the
internal registers window:
<0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
> I could try to use a similar code as in
> arch/arm/mach-mvebu/pm.c:mvebu_internal_reg_base or get the first child
> of "internal-regs" and call of_translate_address on it with one zero cell.
>
> Do you have a better solution?
In mvebu_pcie_map_registers(), we retrieve the address of the PCIe
registers for each port. You can take regs.start, round it down to 1
MB, and you'll get your base address.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
WARNING: multiple messages have this Message-ID (diff)
From: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
To: "Shmuel H." <sh@tkos.co.il>
Cc: "Baruch Siach" <baruch@tkos.co.il>,
"Jason Cooper" <jason@lakedaemon.net>,
linux-pci@vger.kernel.org, "Marek Behún" <marek.behun@nic.cz>,
"Chris ackham" <chris.packham@alliedtelesis.co.nz>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC PATCH] pci: pci-mvebu: setup BAR0 to internal-regs
Date: Wed, 10 Jun 2020 21:20:37 +0200 [thread overview]
Message-ID: <20200610212037.7fd32a43@windsurf.home> (raw)
In-Reply-To: <ae84b87c-665b-7619-7cb0-a1fd58b17d8f@tkos.co.il>
On Wed, 10 Jun 2020 17:17:15 +0300
"Shmuel H." <sh@tkos.co.il> wrote:
> Apparently, the PCIe controller is outside of the internal registers space.
No, it is not.
It is outside of the internal-regs node in the DT because it needs more
"ranges" properties, but the PCIe controller registers *are* within the
internal registers window:
<0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
0x82000000 0 0x48000 MBUS_ID(0xf0, 0x01) 0x48000 0 0x00002000
> I could try to use a similar code as in
> arch/arm/mach-mvebu/pm.c:mvebu_internal_reg_base or get the first child
> of "internal-regs" and call of_translate_address on it with one zero cell.
>
> Do you have a better solution?
In mvebu_pcie_map_registers(), we retrieve the address of the PCIe
registers for each port. You can take regs.start, round it down to 1
MB, and you'll get your base address.
Best regards,
Thomas
--
Thomas Petazzoni, CTO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-06-10 19:20 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-08 14:40 [RFC PATCH] pci: pci-mvebu: setup BAR0 to internal-regs Shmuel Hazan
2020-06-08 14:40 ` Shmuel Hazan
2020-06-08 19:43 ` Thomas Petazzoni
2020-06-08 19:43 ` Thomas Petazzoni
2020-06-09 11:21 ` Shmuel H.
2020-06-09 11:21 ` Shmuel H.
2020-06-10 10:27 ` Thomas Petazzoni
2020-06-10 10:27 ` Thomas Petazzoni
2020-06-10 11:09 ` Shmuel H.
2020-06-10 11:09 ` Shmuel H.
2020-06-10 14:17 ` Shmuel H.
2020-06-10 14:17 ` Shmuel H.
2020-06-10 19:20 ` Thomas Petazzoni [this message]
2020-06-10 19:20 ` Thomas Petazzoni
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