From: kernel test robot <lkp@intel.com>
To: Vishal Sagar <vishal.sagar@xilinx.com>,
hyunk@xilinx.com, laurent.pinchart@ideasonboard.com,
hverkuil@xs4all.nl, mchehab@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, michals@xilinx.com,
linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: kbuild-all@lists.01.org
Subject: Re: [PATCH v3 3/3] media: v4l: xilinx: Add Xilinx UHD-SDI Rx Subsystem driver
Date: Thu, 18 Jun 2020 14:53:55 +0800 [thread overview]
Message-ID: <202006181431.KJrutUsN%lkp@intel.com> (raw)
In-Reply-To: <20200618053304.14551-4-vishal.sagar@xilinx.com>
[-- Attachment #1: Type: text/plain, Size: 4504 bytes --]
Hi Vishal,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linuxtv-media/master]
[also build test ERROR on robh/for-next v5.8-rc1 next-20200618]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vishal-Sagar/Add-support-for-Xilinx-UHD-SDI-Receiver-subsystem/20200618-135100
base: git://linuxtv.org/media_tree.git master
config: arc-allyesconfig (attached as .config)
compiler: arc-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
vim +/irqreturn_t +1113 drivers/media/platform/xilinx/xilinx-sdirxss.c
1103
1104 /**
1105 * xsdirxss_irq_handler - Interrupt handler for SDI Rx
1106 * @irq: IRQ number
1107 * @dev_id: Pointer to device state
1108 *
1109 * The SDI Rx interrupts are cleared by writing 1 to corresponding bit.
1110 *
1111 * Return: IRQ_HANDLED after handling interrupts
1112 */
> 1113 static irqreturn_t xsdirxss_irq_handler(int irq, void *dev_id)
1114 {
1115 struct xsdirxss_state *state = (struct xsdirxss_state *)dev_id;
1116 struct device *dev = state->dev;
1117 u32 status;
1118
1119 status = xsdirxss_read(state, XSDIRX_ISR_REG);
1120 xsdirxss_write(state, XSDIRX_ISR_REG, status);
1121 dev_dbg(dev, "interrupt status = 0x%08x\n", status);
1122
1123 if (!status)
> 1124 return IRQ_NONE;
1125
1126 if (status & XSDIRX_INTR_VIDLOCK_MASK ||
1127 status & XSDIRX_INTR_VIDUNLOCK_MASK) {
1128 u32 val1, val2;
1129 struct v4l2_event event = { 0 };
1130 unsigned long flags;
1131
1132 dev_dbg(dev, "video lock/unlock interrupt\n");
1133
1134 spin_lock_irqsave(&state->slock, flags);
1135 xsdirx_streamflow_control(state, false);
1136
1137 val1 = xsdirxss_read(state, XSDIRX_MODE_DET_STAT_REG);
1138 val2 = xsdirxss_read(state, XSDIRX_TS_DET_STAT_REG);
1139
1140 if ((val1 & XSDIRX_MODE_DET_STAT_MODE_LOCK_MASK) &&
1141 (val2 & XSDIRX_TS_DET_STAT_LOCKED_MASK)) {
1142 u32 mask = XSDIRX_RST_CTRL_RST_CRC_ERRCNT_MASK |
1143 XSDIRX_RST_CTRL_RST_EDH_ERRCNT_MASK;
1144
1145 dev_dbg(dev, "video lock interrupt\n");
1146
1147 xsdirxss_set(state, XSDIRX_RST_CTRL_REG, mask);
1148 xsdirxss_clr(state, XSDIRX_RST_CTRL_REG, mask);
1149
1150 val1 = xsdirxss_read(state, XSDIRX_ST352_VALID_REG);
1151 val2 = xsdirxss_read(state, XSDIRX_ST352_DS1_REG);
1152
1153 dev_dbg(dev, "valid st352 mask = 0x%08x\n", val1);
1154 dev_dbg(dev, "st352 payload = 0x%08x\n", val2);
1155
1156 if (!xsdirx_get_stream_properties(state)) {
1157 state->vidlocked = true;
1158 xsdirxss_set_gtclk(state);
1159 } else {
1160 dev_err(dev, "Unable to get stream properties!\n");
1161 state->vidlocked = false;
1162 }
1163 } else {
1164 dev_dbg(dev, "video unlock interrupt\n");
1165 state->vidlocked = false;
1166 }
1167 spin_unlock_irqrestore(&state->slock, flags);
1168
1169 event.type = V4L2_EVENT_SOURCE_CHANGE;
1170 event.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION;
1171 v4l2_subdev_notify_event(&state->subdev, &event);
1172 }
1173
1174 if (status & (XSDIRX_INTR_UNDERFLOW_MASK | XSDIRX_INTR_OVERFLOW_MASK)) {
1175 struct v4l2_event event = { 0 };
1176
1177 dev_dbg(dev, "Video in to AXI4 Stream core under/overflow interrupt\n");
1178
1179 event.type = V4L2_EVENT_XILINX_SDIRX_UND_OVR_FLOW;
1180 if (status & XSDIRX_INTR_UNDERFLOW_MASK)
1181 event.u.data[0] = XILINX_SDIRX_UNDERFLOW_EVENT;
1182 if (status & XSDIRX_INTR_OVERFLOW_MASK)
1183 event.u.data[0] = XILINX_SDIRX_OVERFLOW_EVENT;
1184
1185 v4l2_subdev_notify_event(&state->subdev, &event);
1186 }
> 1187 return IRQ_HANDLED;
1188 }
1189
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 64639 bytes --]
[-- Attachment #3: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: kernel test robot <lkp@intel.com>
To: Vishal Sagar <vishal.sagar@xilinx.com>,
hyunk@xilinx.com, laurent.pinchart@ideasonboard.com,
hverkuil@xs4all.nl, mchehab@kernel.org, robh+dt@kernel.org,
mark.rutland@arm.com, michals@xilinx.com,
linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Cc: kbuild-all@lists.01.org
Subject: Re: [PATCH v3 3/3] media: v4l: xilinx: Add Xilinx UHD-SDI Rx Subsystem driver
Date: Thu, 18 Jun 2020 14:53:55 +0800 [thread overview]
Message-ID: <202006181431.KJrutUsN%lkp@intel.com> (raw)
In-Reply-To: <20200618053304.14551-4-vishal.sagar@xilinx.com>
[-- Attachment #1: Type: text/plain, Size: 4504 bytes --]
Hi Vishal,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linuxtv-media/master]
[also build test ERROR on robh/for-next v5.8-rc1 next-20200618]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vishal-Sagar/Add-support-for-Xilinx-UHD-SDI-Receiver-subsystem/20200618-135100
base: git://linuxtv.org/media_tree.git master
config: arc-allyesconfig (attached as .config)
compiler: arc-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
vim +/irqreturn_t +1113 drivers/media/platform/xilinx/xilinx-sdirxss.c
1103
1104 /**
1105 * xsdirxss_irq_handler - Interrupt handler for SDI Rx
1106 * @irq: IRQ number
1107 * @dev_id: Pointer to device state
1108 *
1109 * The SDI Rx interrupts are cleared by writing 1 to corresponding bit.
1110 *
1111 * Return: IRQ_HANDLED after handling interrupts
1112 */
> 1113 static irqreturn_t xsdirxss_irq_handler(int irq, void *dev_id)
1114 {
1115 struct xsdirxss_state *state = (struct xsdirxss_state *)dev_id;
1116 struct device *dev = state->dev;
1117 u32 status;
1118
1119 status = xsdirxss_read(state, XSDIRX_ISR_REG);
1120 xsdirxss_write(state, XSDIRX_ISR_REG, status);
1121 dev_dbg(dev, "interrupt status = 0x%08x\n", status);
1122
1123 if (!status)
> 1124 return IRQ_NONE;
1125
1126 if (status & XSDIRX_INTR_VIDLOCK_MASK ||
1127 status & XSDIRX_INTR_VIDUNLOCK_MASK) {
1128 u32 val1, val2;
1129 struct v4l2_event event = { 0 };
1130 unsigned long flags;
1131
1132 dev_dbg(dev, "video lock/unlock interrupt\n");
1133
1134 spin_lock_irqsave(&state->slock, flags);
1135 xsdirx_streamflow_control(state, false);
1136
1137 val1 = xsdirxss_read(state, XSDIRX_MODE_DET_STAT_REG);
1138 val2 = xsdirxss_read(state, XSDIRX_TS_DET_STAT_REG);
1139
1140 if ((val1 & XSDIRX_MODE_DET_STAT_MODE_LOCK_MASK) &&
1141 (val2 & XSDIRX_TS_DET_STAT_LOCKED_MASK)) {
1142 u32 mask = XSDIRX_RST_CTRL_RST_CRC_ERRCNT_MASK |
1143 XSDIRX_RST_CTRL_RST_EDH_ERRCNT_MASK;
1144
1145 dev_dbg(dev, "video lock interrupt\n");
1146
1147 xsdirxss_set(state, XSDIRX_RST_CTRL_REG, mask);
1148 xsdirxss_clr(state, XSDIRX_RST_CTRL_REG, mask);
1149
1150 val1 = xsdirxss_read(state, XSDIRX_ST352_VALID_REG);
1151 val2 = xsdirxss_read(state, XSDIRX_ST352_DS1_REG);
1152
1153 dev_dbg(dev, "valid st352 mask = 0x%08x\n", val1);
1154 dev_dbg(dev, "st352 payload = 0x%08x\n", val2);
1155
1156 if (!xsdirx_get_stream_properties(state)) {
1157 state->vidlocked = true;
1158 xsdirxss_set_gtclk(state);
1159 } else {
1160 dev_err(dev, "Unable to get stream properties!\n");
1161 state->vidlocked = false;
1162 }
1163 } else {
1164 dev_dbg(dev, "video unlock interrupt\n");
1165 state->vidlocked = false;
1166 }
1167 spin_unlock_irqrestore(&state->slock, flags);
1168
1169 event.type = V4L2_EVENT_SOURCE_CHANGE;
1170 event.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION;
1171 v4l2_subdev_notify_event(&state->subdev, &event);
1172 }
1173
1174 if (status & (XSDIRX_INTR_UNDERFLOW_MASK | XSDIRX_INTR_OVERFLOW_MASK)) {
1175 struct v4l2_event event = { 0 };
1176
1177 dev_dbg(dev, "Video in to AXI4 Stream core under/overflow interrupt\n");
1178
1179 event.type = V4L2_EVENT_XILINX_SDIRX_UND_OVR_FLOW;
1180 if (status & XSDIRX_INTR_UNDERFLOW_MASK)
1181 event.u.data[0] = XILINX_SDIRX_UNDERFLOW_EVENT;
1182 if (status & XSDIRX_INTR_OVERFLOW_MASK)
1183 event.u.data[0] = XILINX_SDIRX_OVERFLOW_EVENT;
1184
1185 v4l2_subdev_notify_event(&state->subdev, &event);
1186 }
> 1187 return IRQ_HANDLED;
1188 }
1189
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 64639 bytes --]
WARNING: multiple messages have this Message-ID (diff)
From: kernel test robot <lkp@intel.com>
To: kbuild-all@lists.01.org
Subject: Re: [PATCH v3 3/3] media: v4l: xilinx: Add Xilinx UHD-SDI Rx Subsystem driver
Date: Thu, 18 Jun 2020 14:53:55 +0800 [thread overview]
Message-ID: <202006181431.KJrutUsN%lkp@intel.com> (raw)
In-Reply-To: <20200618053304.14551-4-vishal.sagar@xilinx.com>
[-- Attachment #1: Type: text/plain, Size: 4626 bytes --]
Hi Vishal,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linuxtv-media/master]
[also build test ERROR on robh/for-next v5.8-rc1 next-20200618]
[cannot apply to xlnx/master]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use as documented in
https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Vishal-Sagar/Add-support-for-Xilinx-UHD-SDI-Receiver-subsystem/20200618-135100
base: git://linuxtv.org/media_tree.git master
config: arc-allyesconfig (attached as .config)
compiler: arc-elf-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# save the attached .config to linux build tree
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=arc
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
All error/warnings (new ones prefixed by >>):
vim +/irqreturn_t +1113 drivers/media/platform/xilinx/xilinx-sdirxss.c
1103
1104 /**
1105 * xsdirxss_irq_handler - Interrupt handler for SDI Rx
1106 * @irq: IRQ number
1107 * @dev_id: Pointer to device state
1108 *
1109 * The SDI Rx interrupts are cleared by writing 1 to corresponding bit.
1110 *
1111 * Return: IRQ_HANDLED after handling interrupts
1112 */
> 1113 static irqreturn_t xsdirxss_irq_handler(int irq, void *dev_id)
1114 {
1115 struct xsdirxss_state *state = (struct xsdirxss_state *)dev_id;
1116 struct device *dev = state->dev;
1117 u32 status;
1118
1119 status = xsdirxss_read(state, XSDIRX_ISR_REG);
1120 xsdirxss_write(state, XSDIRX_ISR_REG, status);
1121 dev_dbg(dev, "interrupt status = 0x%08x\n", status);
1122
1123 if (!status)
> 1124 return IRQ_NONE;
1125
1126 if (status & XSDIRX_INTR_VIDLOCK_MASK ||
1127 status & XSDIRX_INTR_VIDUNLOCK_MASK) {
1128 u32 val1, val2;
1129 struct v4l2_event event = { 0 };
1130 unsigned long flags;
1131
1132 dev_dbg(dev, "video lock/unlock interrupt\n");
1133
1134 spin_lock_irqsave(&state->slock, flags);
1135 xsdirx_streamflow_control(state, false);
1136
1137 val1 = xsdirxss_read(state, XSDIRX_MODE_DET_STAT_REG);
1138 val2 = xsdirxss_read(state, XSDIRX_TS_DET_STAT_REG);
1139
1140 if ((val1 & XSDIRX_MODE_DET_STAT_MODE_LOCK_MASK) &&
1141 (val2 & XSDIRX_TS_DET_STAT_LOCKED_MASK)) {
1142 u32 mask = XSDIRX_RST_CTRL_RST_CRC_ERRCNT_MASK |
1143 XSDIRX_RST_CTRL_RST_EDH_ERRCNT_MASK;
1144
1145 dev_dbg(dev, "video lock interrupt\n");
1146
1147 xsdirxss_set(state, XSDIRX_RST_CTRL_REG, mask);
1148 xsdirxss_clr(state, XSDIRX_RST_CTRL_REG, mask);
1149
1150 val1 = xsdirxss_read(state, XSDIRX_ST352_VALID_REG);
1151 val2 = xsdirxss_read(state, XSDIRX_ST352_DS1_REG);
1152
1153 dev_dbg(dev, "valid st352 mask = 0x%08x\n", val1);
1154 dev_dbg(dev, "st352 payload = 0x%08x\n", val2);
1155
1156 if (!xsdirx_get_stream_properties(state)) {
1157 state->vidlocked = true;
1158 xsdirxss_set_gtclk(state);
1159 } else {
1160 dev_err(dev, "Unable to get stream properties!\n");
1161 state->vidlocked = false;
1162 }
1163 } else {
1164 dev_dbg(dev, "video unlock interrupt\n");
1165 state->vidlocked = false;
1166 }
1167 spin_unlock_irqrestore(&state->slock, flags);
1168
1169 event.type = V4L2_EVENT_SOURCE_CHANGE;
1170 event.u.src_change.changes = V4L2_EVENT_SRC_CH_RESOLUTION;
1171 v4l2_subdev_notify_event(&state->subdev, &event);
1172 }
1173
1174 if (status & (XSDIRX_INTR_UNDERFLOW_MASK | XSDIRX_INTR_OVERFLOW_MASK)) {
1175 struct v4l2_event event = { 0 };
1176
1177 dev_dbg(dev, "Video in to AXI4 Stream core under/overflow interrupt\n");
1178
1179 event.type = V4L2_EVENT_XILINX_SDIRX_UND_OVR_FLOW;
1180 if (status & XSDIRX_INTR_UNDERFLOW_MASK)
1181 event.u.data[0] = XILINX_SDIRX_UNDERFLOW_EVENT;
1182 if (status & XSDIRX_INTR_OVERFLOW_MASK)
1183 event.u.data[0] = XILINX_SDIRX_OVERFLOW_EVENT;
1184
1185 v4l2_subdev_notify_event(&state->subdev, &event);
1186 }
> 1187 return IRQ_HANDLED;
1188 }
1189
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 64639 bytes --]
next prev parent reply other threads:[~2020-06-18 6:54 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-18 5:33 [PATCH v3 0/3] Add support for Xilinx UHD-SDI Receiver subsystem Vishal Sagar
2020-06-18 5:33 ` Vishal Sagar
2020-06-18 5:33 ` [PATCH v3 1/3] v4l2-dv-timings: Add timings for 1920x1080P48 and 4KP48 Vishal Sagar
2020-06-18 5:33 ` Vishal Sagar
2020-07-15 16:16 ` Laurent Pinchart
2020-07-15 16:16 ` Laurent Pinchart
2020-06-18 5:33 ` [PATCH v3 2/3] media: dt-bindings: media: xilinx: Add Xilinx UHD-SDI Receiver Subsystem Vishal Sagar
2020-06-18 5:33 ` Vishal Sagar
2020-07-13 18:54 ` Rob Herring
2020-07-13 18:54 ` Rob Herring
2020-07-15 16:29 ` Laurent Pinchart
2020-07-15 16:29 ` Laurent Pinchart
2020-08-19 13:45 ` Vishal Sagar
2020-08-19 13:45 ` Vishal Sagar
2020-08-19 16:40 ` Laurent Pinchart
2020-08-19 16:40 ` Laurent Pinchart
2020-08-24 1:00 ` Laurent Pinchart
2020-08-24 1:00 ` Laurent Pinchart
2020-06-18 5:33 ` [PATCH v3 3/3] media: v4l: xilinx: Add Xilinx UHD-SDI Rx Subsystem driver Vishal Sagar
2020-06-18 5:33 ` Vishal Sagar
2020-06-18 6:53 ` kernel test robot [this message]
2020-06-18 6:53 ` kernel test robot
2020-06-18 6:53 ` kernel test robot
2020-06-18 8:13 ` kernel test robot
2020-06-18 8:13 ` kernel test robot
2020-06-25 9:43 ` Hans Verkuil
2020-06-25 9:43 ` Hans Verkuil
2020-07-15 21:33 ` Laurent Pinchart
2020-07-15 21:33 ` Laurent Pinchart
2020-08-19 13:47 ` Vishal Sagar
2020-08-19 13:47 ` Vishal Sagar
2020-08-19 16:56 ` Laurent Pinchart
2020-08-19 16:56 ` Laurent Pinchart
2020-08-26 14:10 ` Nicolas Dufresne
2020-08-26 14:10 ` Nicolas Dufresne
2020-08-26 14:50 ` Vishal Sagar
2020-08-26 14:50 ` Vishal Sagar
2020-09-10 10:22 ` Hans Verkuil
2020-09-10 10:22 ` Hans Verkuil
2020-09-15 2:38 ` Laurent Pinchart
2020-09-15 2:38 ` Laurent Pinchart
2020-09-15 8:31 ` Hans Verkuil
2020-09-15 8:31 ` Hans Verkuil
2020-08-19 13:47 ` Vishal Sagar
2020-08-19 13:47 ` Vishal Sagar
2020-07-15 22:42 ` Hyun Kwon
2020-07-15 22:42 ` Hyun Kwon
2020-08-19 13:48 ` Vishal Sagar
2020-08-19 13:48 ` Vishal Sagar
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