From: Bjorn Andersson <bjorn.andersson@linaro.org>
To: Konrad Dybcio <konradybcio@gmail.com>
Cc: skrzynka@konradybcio.pl, Andy Gross <agross@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Kees Cook <keescook@chromium.org>,
Anton Vorontsov <anton@enomsg.org>,
Colin Cross <ccross@android.com>, Tony Luck <tony.luck@intel.com>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 07/12] arm64: dts: qcom: msm8994: Add I2C, SPI and BLSP DMA nodes
Date: Tue, 23 Jun 2020 16:21:44 -0700 [thread overview]
Message-ID: <20200623232144.GM128451@builder.lan> (raw)
In-Reply-To: <20200623224813.297077-8-konradybcio@gmail.com>
On Tue 23 Jun 15:48 PDT 2020, Konrad Dybcio wrote:
> Add support for I2C and SPI buses to enable peripherals
> such as touchscreens or sensors. Also add DMA nodes,
> configuration and BLSP2 UART2 interface.
>
> Signed-off-by: Konrad Dybcio <konradybcio@gmail.com>
Applied, thanks
> ---
> arch/arm64/boot/dts/qcom/msm8994.dtsi | 156 +++++++++++++++++++++++++-
> 1 file changed, 155 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi
> index 838ffc0d9c16..8af01ebe73f7 100644
> --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi
> +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi
> @@ -365,14 +365,168 @@ sdhc1: sdhci@f9824900 {
> status = "disabled";
> };
>
> + blsp1_dma: dma@f9904000 {
> + compatible = "qcom,bam-v1.7.0";
> + reg = <0xf9904000 0x19000>;
> + interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "bam_clk";
> + #dma-cells = <1>;
> + qcom,ee = <0>;
> + qcom,controlled-remotely;
> + num-channels = <18>;
> + qcom,num-ees = <4>;
> + };
> +
> blsp1_uart2: serial@f991e000 {
> compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> reg = <0xf991e000 0x1000>;
> interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> - status = "disabled";
> clock-names = "core", "iface";
> clocks = <&gcc GCC_BLSP1_UART2_APPS_CLK>,
> <&gcc GCC_BLSP1_AHB_CLK>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&blsp1_uart2_default>;
> + pinctrl-1 = <&blsp1_uart2_sleep>;
> + status = "disabled";
> + };
> +
> + blsp_i2c1: i2c@f9923000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + reg = <0xf9923000 0x500>;
> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> + <&gcc GCC_BLSP1_QUP1_I2C_APPS_CLK>;
> + clock-names = "iface", "core";
> + clock-frequency = <400000>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c1_default>;
> + pinctrl-1 = <&i2c1_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + blsp_spi0: spi@f9923000 {
> + compatible = "qcom,spi-qup-v2.2.1";
> + reg = <0xf9923000 0x500>;
> + interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_QUP1_SPI_APPS_CLK>,
> + <&gcc GCC_BLSP1_AHB_CLK>;
> + clock-names = "core", "iface";
> + spi-max-frequency = <19200000>;
> + dmas = <&blsp1_dma 12>, <&blsp1_dma 13>;
> + dma-names = "tx", "rx";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&blsp1_spi0_default>;
> + pinctrl-1 = <&blsp1_spi0_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + blsp_i2c2: i2c@f9924000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + reg = <0xf9924000 0x500>;
> + interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> + <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
> + clock-names = "iface", "core";
> + clock-frequency = <355000>;
> + dmas = <&blsp1_dma 14>, <&blsp1_dma 15>;
> + dma-names = "tx", "rx";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c2_default>;
> + pinctrl-1 = <&i2c2_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + /* I2C3 doesn't exist */
> +
> + blsp_i2c4: i2c@f9926000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + reg = <0xf9926000 0x500>;
> + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> + <&gcc GCC_BLSP1_QUP4_I2C_APPS_CLK>;
> + clock-names = "iface", "core";
> + clock-frequency = <355000>;
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c4_default>;
> + pinctrl-1 = <&i2c4_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + blsp2_dma: dma@f9944000 {
> + compatible = "qcom,bam-v1.7.0";
> + reg = <0xf9944000 0x19000>;
> + interrupts = <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP2_AHB_CLK>;
> + clock-names = "bam_clk";
> + #dma-cells = <1>;
> + qcom,ee = <0>;
> + qcom,controlled-remotely;
> + num-channels = <18>;
> + qcom,num-ees = <4>;
> + };
> +
> + /* According to downstream kernels, i2c6
> + * comes before i2c5 address-wise...
> + */
> +
> + blsp_i2c6: i2c@f9928000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + reg = <0xf9928000 0x500>;
> + interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP1_AHB_CLK>,
> + <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>;
> + clock-names = "iface", "core";
> + clock-frequency = <355000>;
> + dmas = <&blsp1_dma 22>, <&blsp1_dma 23>;
> + dma-names = "tx", "rx";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c6_default>;
> + pinctrl-1 = <&i2c6_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + };
> +
> + blsp2_uart2: serial@f995e000 {
> + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
> + reg = <0xf995e000 0x1000>;
> + interrupts = <GIC_SPI 146 IRQ_TYPE_EDGE_FALLING>;
> + clock-names = "core", "iface";
> + clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>,
> + <&gcc GCC_BLSP2_AHB_CLK>;
> + dmas = <&blsp2_dma 2>, <&blsp2_dma 3>;
> + dma-names = "tx", "rx";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&blsp2_uart2_default>;
> + pinctrl-1 = <&blsp2_uart2_sleep>;
> + status = "disabled";
> + };
> +
> + blsp_i2c5: i2c@f9967000 {
> + compatible = "qcom,i2c-qup-v2.2.1";
> + reg = <0xf9967000 0x500>;
> + interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&gcc GCC_BLSP2_AHB_CLK>,
> + <&gcc GCC_BLSP2_QUP5_I2C_APPS_CLK>;
> + clock-names = "iface", "core";
> + clock-frequency = <355000>;
> + dmas = <&blsp2_dma 20>, <&blsp2_dma 21>;
> + dma-names = "tx", "rx";
> + pinctrl-names = "default", "sleep";
> + pinctrl-0 = <&i2c5_default>;
> + pinctrl-1 = <&i2c5_sleep>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> };
>
> gcc: clock-controller@fc400000 {
> --
> 2.27.0
>
next prev parent reply other threads:[~2020-06-23 23:24 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-23 22:47 [PATCH v2 00/12] MSM8994 peripheral enablement, DTS updates Konrad Dybcio
2020-06-23 22:48 ` [PATCH v2 01/12] arm64: dts: qcom: msm8994: Modernize the DTS style Konrad Dybcio
2020-06-23 23:04 ` Bjorn Andersson
2020-06-23 22:48 ` [PATCH v2 02/12] arm64: dts: qcom: msm8994: Add SPMI PMIC arbiter device Konrad Dybcio
2020-06-23 23:15 ` Bjorn Andersson
2020-06-23 22:48 ` [PATCH v2 03/12] arm64: dts: qcom: msm8994: Add a proper CPU map Konrad Dybcio
2020-06-23 23:16 ` Bjorn Andersson
2020-06-23 22:48 ` [PATCH v2 04/12] arm64: dts: qcom: msm8994: Add support for SMD RPM Konrad Dybcio
2020-06-23 23:15 ` Bjorn Andersson
2020-06-23 23:34 ` Konrad Dybcio
2020-06-24 6:40 ` Bjorn Andersson
2020-06-24 15:03 ` Konrad Dybcio
2020-06-23 22:48 ` [PATCH v2 05/12] arm64: dts: qcom: msm8994: Add SDHCI1 node Konrad Dybcio
2020-06-23 23:17 ` Bjorn Andersson
2020-06-23 22:48 ` [PATCH v2 06/12] arm64: dts: qcom: msm8994: Add SCM node Konrad Dybcio
2020-06-23 23:19 ` Bjorn Andersson
2020-06-23 23:30 ` Konrad Dybcio
2020-06-24 7:29 ` Bjorn Andersson
2020-06-23 22:48 ` [PATCH v2 07/12] arm64: dts: qcom: msm8994: Add I2C, SPI and BLSP DMA nodes Konrad Dybcio
2020-06-23 23:21 ` Bjorn Andersson [this message]
2020-06-23 22:48 ` [PATCH v2 08/12] arm64: dts: qcom: msm8994: Add pmu node Konrad Dybcio
2020-06-23 23:22 ` Bjorn Andersson
2020-06-23 22:48 ` [PATCH v2 09/12] arm64: dts: qcom: msm8994: Add PSCI node Konrad Dybcio
2020-06-23 23:22 ` Bjorn Andersson
2020-06-23 22:48 ` [PATCH v2 10/12] arm64: dts: qcom: angler: Add qcom,msm-id and pmic-id Konrad Dybcio
2020-06-23 23:23 ` Bjorn Andersson
2020-06-23 22:48 ` [PATCH v2 11/12] arm64: dts: qcom: Move msm8994-smd-rpm contents to lg-bullhead Konrad Dybcio
2020-06-23 23:24 ` Bjorn Andersson
2020-06-23 22:48 ` [PATCH v2 12/12] arm64: dts: qcom: Add support for Sony Xperia Z5 (SoMC Sumire-RoW) Konrad Dybcio
2020-06-23 23:27 ` Bjorn Andersson
2020-06-24 14:44 ` Konrad Dybcio
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