From: Rob Herring <robh@kernel.org>
To: "Horia Geantă" <horia.geanta@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Matt Mackall <mpm@selenic.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Arnd Bergmann <arnd@arndb.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Martin Kaiser <martin@kaiser.cx>,
Franck Lenormand <franck.lenormand@nxp.com>,
Iuliana Prodan <iuliana.prodan@nxp.com>,
Silvano Di Ninno <silvano.dininno@nxp.com>,
linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs
Date: Mon, 13 Jul 2020 18:03:52 -0600 [thread overview]
Message-ID: <20200714000352.GA966545@bogus> (raw)
In-Reply-To: <20200621145658.12528-2-horia.geanta@nxp.com>
On Sun, Jun 21, 2020 at 05:56:54PM +0300, Horia Geantă wrote:
> RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ.
> Add corresponding compatible strings.
>
> Note:
>
> Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
> also have a RNGB, however it's part of the CAAM
> (Cryptograhic Accelerator and Assurance Module) crypto accelerator.
> In this case, RNGB is managed in the caam driver
> (drivers/crypto/caam/), since it's tightly related to
> the caam "job ring" interface, not to mention CAAM internally relying on
> RNGB as source of randomness.
>
> On the other hand, the i.MX6 SoCs with RNGB have a DCP
> (Data Co-Processor) crypto accelerator and this block and RNGB
> are independent.
>
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
> ---
> Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/rng/imx-rng.txt
> index 405c2b00ccb0..eb227db9e684 100644
> --- a/Documentation/devicetree/bindings/rng/imx-rng.txt
> +++ b/Documentation/devicetree/bindings/rng/imx-rng.txt
> @@ -5,6 +5,9 @@ Required properties:
> "fsl,imx21-rnga"
> "fsl,imx31-rnga" (backward compatible with "fsl,imx21-rnga")
> "fsl,imx25-rngb"
> + "fsl,imx6sl-rngb"
> + "fsl,imx6sll-rngb"
> + "fsl,imx6ull-rngb"
These are all different? IOW, no fallback compatible?
> "fsl,imx35-rngc"
> - reg : offset and length of the register set of this block
> - interrupts : the interrupt number for the RNG block
> --
> 2.17.1
>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: "Horia Geantă" <horia.geanta@nxp.com>
Cc: devicetree@vger.kernel.org, Martin Kaiser <martin@kaiser.cx>,
Herbert Xu <herbert@gondor.apana.org.au>,
Arnd Bergmann <arnd@arndb.de>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Iuliana Prodan <iuliana.prodan@nxp.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
linux-kernel@vger.kernel.org,
Franck Lenormand <franck.lenormand@nxp.com>,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Matt Mackall <mpm@selenic.com>,
Silvano Di Ninno <silvano.dininno@nxp.com>,
Fabio Estevam <festevam@gmail.com>,
linux-arm-kernel@lists.infradead.org,
linux-crypto@vger.kernel.org
Subject: Re: [PATCH v2 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs
Date: Mon, 13 Jul 2020 18:03:52 -0600 [thread overview]
Message-ID: <20200714000352.GA966545@bogus> (raw)
In-Reply-To: <20200621145658.12528-2-horia.geanta@nxp.com>
On Sun, Jun 21, 2020 at 05:56:54PM +0300, Horia Geantă wrote:
> RNGB block is found in some i.MX6 SoCs - 6SL, 6SLL, 6ULL, 6ULZ.
> Add corresponding compatible strings.
>
> Note:
>
> Several NXP SoC from QorIQ family (P1010, P1023, P4080, P3041, P5020)
> also have a RNGB, however it's part of the CAAM
> (Cryptograhic Accelerator and Assurance Module) crypto accelerator.
> In this case, RNGB is managed in the caam driver
> (drivers/crypto/caam/), since it's tightly related to
> the caam "job ring" interface, not to mention CAAM internally relying on
> RNGB as source of randomness.
>
> On the other hand, the i.MX6 SoCs with RNGB have a DCP
> (Data Co-Processor) crypto accelerator and this block and RNGB
> are independent.
>
> Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
> ---
> Documentation/devicetree/bindings/rng/imx-rng.txt | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/rng/imx-rng.txt
> index 405c2b00ccb0..eb227db9e684 100644
> --- a/Documentation/devicetree/bindings/rng/imx-rng.txt
> +++ b/Documentation/devicetree/bindings/rng/imx-rng.txt
> @@ -5,6 +5,9 @@ Required properties:
> "fsl,imx21-rnga"
> "fsl,imx31-rnga" (backward compatible with "fsl,imx21-rnga")
> "fsl,imx25-rngb"
> + "fsl,imx6sl-rngb"
> + "fsl,imx6sll-rngb"
> + "fsl,imx6ull-rngb"
These are all different? IOW, no fallback compatible?
> "fsl,imx35-rngc"
> - reg : offset and length of the register set of this block
> - interrupts : the interrupt number for the RNG block
> --
> 2.17.1
>
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next prev parent reply other threads:[~2020-07-14 0:04 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-21 14:56 [PATCH v2 0/5] hwrng: add support for i.MX6 rngb Horia Geantă
2020-06-21 14:56 ` [PATCH v2 1/5] dt-bindings: rng: add RNGB compatibles for i.MX6 SoCs Horia Geantă
2020-07-14 0:03 ` Rob Herring [this message]
2020-07-14 0:03 ` Rob Herring
2020-07-14 12:24 ` Horia Geantă
2020-07-14 12:24 ` Horia Geantă
2020-06-21 14:56 ` [PATCH v2 2/5] ARM: dts: imx6sl: fix rng node Horia Geantă
2020-06-21 14:56 ` [PATCH v2 3/5] ARM: dts: imx6sll: add rng Horia Geantă
2020-06-21 14:56 ` [PATCH v2 4/5] ARM: dts: imx6ull: " Horia Geantă
2020-07-02 8:27 ` Marco Felsch
2020-07-02 8:27 ` Marco Felsch
2020-06-21 14:56 ` [PATCH v2 5/5] hwrng: imx-rngc: enable driver for i.MX6 Horia Geantă
2020-06-21 17:38 ` Martin Kaiser
2020-07-02 8:28 ` Marco Felsch
2020-07-02 8:28 ` Marco Felsch
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