* [PATCH] arm64: tegra: Add the GPU on Tegra194
@ 2020-07-16 12:01 ` Thierry Reding
0 siblings, 0 replies; 8+ messages in thread
From: Thierry Reding @ 2020-07-16 12:01 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, Terje Bergstrom, Debarshi Dutta,
linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
GV11B.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 33 ++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 259e40469908..f559fe983ebe 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1395,6 +1395,39 @@ sor3: sor@15bc0000 {
nvidia,interface = <3>;
};
};
+
+ gpu@17000000 {
+ compatible = "nvidia,gv11b";
+ reg = <0x17000000 0x10000000>,
+ <0x18000000 0x10000000>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "stall", "nonstall";
+ clocks = <&bpmp TEGRA194_CLK_GPCCLK>,
+ <&bpmp TEGRA194_CLK_GPU_PWR>;
+ clock-names = "gpu", "pwr";
+ resets = <&bpmp TEGRA194_RESET_GPU>;
+ reset-names = "gpu";
+ status = "disabled";
+
+ power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVL1R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL1RHP &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL1W &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL2R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL2RHP &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL2W &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL3R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL3RHP &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL3W &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL4R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL4RHP &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL4W &emc>;
+ interconnect-names = "dma-mem", "read-0-hp", "write-0",
+ "read-1", "read-1-hp", "write-1",
+ "read-2", "read-2-hp", "write-2",
+ "read-3", "read-3-hp", "write-3";
+ };
};
pcie@14100000 {
--
2.27.0
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH] arm64: tegra: Add the GPU on Tegra194
@ 2020-07-16 12:01 ` Thierry Reding
0 siblings, 0 replies; 8+ messages in thread
From: Thierry Reding @ 2020-07-16 12:01 UTC (permalink / raw)
To: Thierry Reding
Cc: linux-tegra, Debarshi Dutta, Terje Bergstrom, linux-arm-kernel,
Jon Hunter
From: Thierry Reding <treding@nvidia.com>
The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
GV11B.
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 33 ++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 259e40469908..f559fe983ebe 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1395,6 +1395,39 @@ sor3: sor@15bc0000 {
nvidia,interface = <3>;
};
};
+
+ gpu@17000000 {
+ compatible = "nvidia,gv11b";
+ reg = <0x17000000 0x10000000>,
+ <0x18000000 0x10000000>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "stall", "nonstall";
+ clocks = <&bpmp TEGRA194_CLK_GPCCLK>,
+ <&bpmp TEGRA194_CLK_GPU_PWR>;
+ clock-names = "gpu", "pwr";
+ resets = <&bpmp TEGRA194_RESET_GPU>;
+ reset-names = "gpu";
+ status = "disabled";
+
+ power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVL1R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL1RHP &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL1W &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL2R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL2RHP &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL2W &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL3R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL3RHP &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL3W &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL4R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL4RHP &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVL4W &emc>;
+ interconnect-names = "dma-mem", "read-0-hp", "write-0",
+ "read-1", "read-1-hp", "write-1",
+ "read-2", "read-2-hp", "write-2",
+ "read-3", "read-3-hp", "write-3";
+ };
};
pcie@14100000 {
--
2.27.0
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 8+ messages in thread[parent not found: <20200716120138.532906-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>]
* Re: [PATCH] arm64: tegra: Add the GPU on Tegra194
2020-07-16 12:01 ` Thierry Reding
@ 2020-07-16 12:59 ` Jon Hunter
-1 siblings, 0 replies; 8+ messages in thread
From: Jon Hunter @ 2020-07-16 12:59 UTC (permalink / raw)
To: Thierry Reding
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA, Debarshi Dutta,
Terje Bergstrom,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 16/07/2020 13:01, Thierry Reding wrote:
> From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
>
> The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
> GV11B.
>
> Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> ---
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 33 ++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index 259e40469908..f559fe983ebe 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -1395,6 +1395,39 @@ sor3: sor@15bc0000 {
> nvidia,interface = <3>;
> };
> };
> +
> + gpu@17000000 {
> + compatible = "nvidia,gv11b";
I think we also need to add the to binding doc.
> + reg = <0x17000000 0x10000000>,
> + <0x18000000 0x10000000>;
> + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "stall", "nonstall";
> + clocks = <&bpmp TEGRA194_CLK_GPCCLK>,
> + <&bpmp TEGRA194_CLK_GPU_PWR>;
> + clock-names = "gpu", "pwr";
> + resets = <&bpmp TEGRA194_RESET_GPU>;
> + reset-names = "gpu";
> + status = "disabled";
> +
> + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;
> + interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVL1R &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL1RHP &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL1W &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL2R &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL2RHP &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL2W &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL3R &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL3RHP &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL3W &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL4R &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL4RHP &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL4W &emc>;
> + interconnect-names = "dma-mem", "read-0-hp", "write-0",
> + "read-1", "read-1-hp", "write-1",
> + "read-2", "read-2-hp", "write-2",
> + "read-3", "read-3-hp", "write-3";
> + };
> };
I also see that for gv11b we populate 'dma-coherent' and so we should
probably add this as well.
Cheers
Jon
--
nvpublic
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: tegra: Add the GPU on Tegra194
@ 2020-07-16 12:59 ` Jon Hunter
0 siblings, 0 replies; 8+ messages in thread
From: Jon Hunter @ 2020-07-16 12:59 UTC (permalink / raw)
To: Thierry Reding
Cc: linux-tegra, Debarshi Dutta, Terje Bergstrom, linux-arm-kernel
On 16/07/2020 13:01, Thierry Reding wrote:
> From: Thierry Reding <treding@nvidia.com>
>
> The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
> GV11B.
>
> Signed-off-by: Thierry Reding <treding@nvidia.com>
> ---
> arch/arm64/boot/dts/nvidia/tegra194.dtsi | 33 ++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> index 259e40469908..f559fe983ebe 100644
> --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> @@ -1395,6 +1395,39 @@ sor3: sor@15bc0000 {
> nvidia,interface = <3>;
> };
> };
> +
> + gpu@17000000 {
> + compatible = "nvidia,gv11b";
I think we also need to add the to binding doc.
> + reg = <0x17000000 0x10000000>,
> + <0x18000000 0x10000000>;
> + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "stall", "nonstall";
> + clocks = <&bpmp TEGRA194_CLK_GPCCLK>,
> + <&bpmp TEGRA194_CLK_GPU_PWR>;
> + clock-names = "gpu", "pwr";
> + resets = <&bpmp TEGRA194_RESET_GPU>;
> + reset-names = "gpu";
> + status = "disabled";
> +
> + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;
> + interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVL1R &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL1RHP &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL1W &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL2R &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL2RHP &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL2W &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL3R &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL3RHP &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL3W &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL4R &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL4RHP &emc>,
> + <&mc TEGRA194_MEMORY_CLIENT_NVL4W &emc>;
> + interconnect-names = "dma-mem", "read-0-hp", "write-0",
> + "read-1", "read-1-hp", "write-1",
> + "read-2", "read-2-hp", "write-2",
> + "read-3", "read-3-hp", "write-3";
> + };
> };
I also see that for gv11b we populate 'dma-coherent' and so we should
probably add this as well.
Cheers
Jon
--
nvpublic
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread[parent not found: <3748e071-4d08-8e77-43f6-de37f5a7eb1e-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>]
* Re: [PATCH] arm64: tegra: Add the GPU on Tegra194
2020-07-16 12:59 ` Jon Hunter
@ 2020-07-16 13:17 ` Thierry Reding
-1 siblings, 0 replies; 8+ messages in thread
From: Thierry Reding @ 2020-07-16 13:17 UTC (permalink / raw)
To: Jon Hunter
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA, Debarshi Dutta,
Terje Bergstrom,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
[-- Attachment #1: Type: text/plain, Size: 3475 bytes --]
On Thu, Jul 16, 2020 at 01:59:33PM +0100, Jon Hunter wrote:
>
> On 16/07/2020 13:01, Thierry Reding wrote:
> > From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> >
> > The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
> > GV11B.
> >
> > Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
> > ---
> > arch/arm64/boot/dts/nvidia/tegra194.dtsi | 33 ++++++++++++++++++++++++
> > 1 file changed, 33 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> > index 259e40469908..f559fe983ebe 100644
> > --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> > +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> > @@ -1395,6 +1395,39 @@ sor3: sor@15bc0000 {
> > nvidia,interface = <3>;
> > };
> > };
> > +
> > + gpu@17000000 {
> > + compatible = "nvidia,gv11b";
>
> I think we also need to add the to binding doc.
I've got a patch that converts the nvidia,gk20a.txt to the json-schema
format and then a patch on top that adds this compatible string. Since
that patch is part of a larger series that's a bit stalled, I'll add
this to the existing bindings for now.
> > + reg = <0x17000000 0x10000000>,
> > + <0x18000000 0x10000000>;
> > + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "stall", "nonstall";
> > + clocks = <&bpmp TEGRA194_CLK_GPCCLK>,
> > + <&bpmp TEGRA194_CLK_GPU_PWR>;
> > + clock-names = "gpu", "pwr";
> > + resets = <&bpmp TEGRA194_RESET_GPU>;
> > + reset-names = "gpu";
> > + status = "disabled";
> > +
> > + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;
> > + interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVL1R &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL1RHP &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL1W &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL2R &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL2RHP &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL2W &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL3R &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL3RHP &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL3W &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL4R &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL4RHP &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL4W &emc>;
> > + interconnect-names = "dma-mem", "read-0-hp", "write-0",
> > + "read-1", "read-1-hp", "write-1",
> > + "read-2", "read-2-hp", "write-2",
> > + "read-3", "read-3-hp", "write-3";
> > + };
> > };
>
> I also see that for gv11b we populate 'dma-coherent' and so we should
> probably add this as well.
Do we know for certain that the GPU is DMA coherent? I've only tested
this (with local patches to Nouveau) without dma-coherent, so I have not
actually verified that it works without.
I vaguely recall reading that there are different apertures for sysmem,
one for coherent sysmem and another for non-coherent sysmem. So I'm not
sure if dma-coherent here will work without additional code in the
driver to ensure that all memory is allocated from the coherent sysmem
aperture.
I'd suggest we leave this as-is for now until we're further along with
GPU support and we can properly test this. Leaving out dma-coherent
should be harmless and in the worst case unnecessarily flushes caches.
Thierry
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^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: tegra: Add the GPU on Tegra194
@ 2020-07-16 13:17 ` Thierry Reding
0 siblings, 0 replies; 8+ messages in thread
From: Thierry Reding @ 2020-07-16 13:17 UTC (permalink / raw)
To: Jon Hunter; +Cc: linux-tegra, Debarshi Dutta, Terje Bergstrom, linux-arm-kernel
[-- Attachment #1.1: Type: text/plain, Size: 3417 bytes --]
On Thu, Jul 16, 2020 at 01:59:33PM +0100, Jon Hunter wrote:
>
> On 16/07/2020 13:01, Thierry Reding wrote:
> > From: Thierry Reding <treding@nvidia.com>
> >
> > The GPU found on NVIDIA Tegra194 SoCs is a Volta generation GPU called
> > GV11B.
> >
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> > arch/arm64/boot/dts/nvidia/tegra194.dtsi | 33 ++++++++++++++++++++++++
> > 1 file changed, 33 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> > index 259e40469908..f559fe983ebe 100644
> > --- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> > +++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
> > @@ -1395,6 +1395,39 @@ sor3: sor@15bc0000 {
> > nvidia,interface = <3>;
> > };
> > };
> > +
> > + gpu@17000000 {
> > + compatible = "nvidia,gv11b";
>
> I think we also need to add the to binding doc.
I've got a patch that converts the nvidia,gk20a.txt to the json-schema
format and then a patch on top that adds this compatible string. Since
that patch is part of a larger series that's a bit stalled, I'll add
this to the existing bindings for now.
> > + reg = <0x17000000 0x10000000>,
> > + <0x18000000 0x10000000>;
> > + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
> > + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
> > + interrupt-names = "stall", "nonstall";
> > + clocks = <&bpmp TEGRA194_CLK_GPCCLK>,
> > + <&bpmp TEGRA194_CLK_GPU_PWR>;
> > + clock-names = "gpu", "pwr";
> > + resets = <&bpmp TEGRA194_RESET_GPU>;
> > + reset-names = "gpu";
> > + status = "disabled";
> > +
> > + power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>;
> > + interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVL1R &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL1RHP &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL1W &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL2R &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL2RHP &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL2W &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL3R &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL3RHP &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL3W &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL4R &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL4RHP &emc>,
> > + <&mc TEGRA194_MEMORY_CLIENT_NVL4W &emc>;
> > + interconnect-names = "dma-mem", "read-0-hp", "write-0",
> > + "read-1", "read-1-hp", "write-1",
> > + "read-2", "read-2-hp", "write-2",
> > + "read-3", "read-3-hp", "write-3";
> > + };
> > };
>
> I also see that for gv11b we populate 'dma-coherent' and so we should
> probably add this as well.
Do we know for certain that the GPU is DMA coherent? I've only tested
this (with local patches to Nouveau) without dma-coherent, so I have not
actually verified that it works without.
I vaguely recall reading that there are different apertures for sysmem,
one for coherent sysmem and another for non-coherent sysmem. So I'm not
sure if dma-coherent here will work without additional code in the
driver to ensure that all memory is allocated from the coherent sysmem
aperture.
I'd suggest we leave this as-is for now until we're further along with
GPU support and we can properly test this. Leaving out dma-coherent
should be harmless and in the worst case unnecessarily flushes caches.
Thierry
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH] arm64: tegra: Add the GPU on Tegra194
2020-07-16 13:17 ` Thierry Reding
@ 2020-07-16 15:05 ` Terje Bergstrom
-1 siblings, 0 replies; 8+ messages in thread
From: Terje Bergstrom @ 2020-07-16 15:05 UTC (permalink / raw)
To: Thierry Reding, Jon Hunter
Cc: linux-tegra-u79uwXL29TY76Z2rM5mHXA, Debarshi Dutta,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
On 7/16/2020 6:17 AM, Thierry Reding wrote:
> On Thu, Jul 16, 2020 at 01:59:33PM +0100, Jon Hunter wrote:
>> I also see that for gv11b we populate 'dma-coherent' and so we should
>> probably add this as well.
> Do we know for certain that the GPU is DMA coherent? I've only tested
> this (with local patches to Nouveau) without dma-coherent, so I have not
> actually verified that it works without.
>
> I vaguely recall reading that there are different apertures for sysmem,
> one for coherent sysmem and another for non-coherent sysmem. So I'm not
> sure if dma-coherent here will work without additional code in the
> driver to ensure that all memory is allocated from the coherent sysmem
> aperture.
We do have the choices of coherent and non-coherent memory accesses in
the iGPU via the two sysmem apertures. But in Tegra194 we're forcing
coherency from the memory subsystem side, so all accesses are coherent.
Terje
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH] arm64: tegra: Add the GPU on Tegra194
@ 2020-07-16 15:05 ` Terje Bergstrom
0 siblings, 0 replies; 8+ messages in thread
From: Terje Bergstrom @ 2020-07-16 15:05 UTC (permalink / raw)
To: Thierry Reding, Jon Hunter; +Cc: linux-tegra, Debarshi Dutta, linux-arm-kernel
On 7/16/2020 6:17 AM, Thierry Reding wrote:
> On Thu, Jul 16, 2020 at 01:59:33PM +0100, Jon Hunter wrote:
>> I also see that for gv11b we populate 'dma-coherent' and so we should
>> probably add this as well.
> Do we know for certain that the GPU is DMA coherent? I've only tested
> this (with local patches to Nouveau) without dma-coherent, so I have not
> actually verified that it works without.
>
> I vaguely recall reading that there are different apertures for sysmem,
> one for coherent sysmem and another for non-coherent sysmem. So I'm not
> sure if dma-coherent here will work without additional code in the
> driver to ensure that all memory is allocated from the coherent sysmem
> aperture.
We do have the choices of coherent and non-coherent memory accesses in
the iGPU via the two sysmem apertures. But in Tegra194 we're forcing
coherency from the memory subsystem side, so all accesses are coherent.
Terje
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^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2020-07-16 15:06 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-07-16 12:01 [PATCH] arm64: tegra: Add the GPU on Tegra194 Thierry Reding
2020-07-16 12:01 ` Thierry Reding
[not found] ` <20200716120138.532906-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2020-07-16 12:59 ` Jon Hunter
2020-07-16 12:59 ` Jon Hunter
[not found] ` <3748e071-4d08-8e77-43f6-de37f5a7eb1e-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
2020-07-16 13:17 ` Thierry Reding
2020-07-16 13:17 ` Thierry Reding
2020-07-16 15:05 ` Terje Bergstrom
2020-07-16 15:05 ` Terje Bergstrom
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