From: Rob Herring <robh@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
Nicolas Boichat <drinkcat@chromium.org>,
cui.zhang@mediatek.com, srv_heupstream@mediatek.com,
chao.hao@mediatek.com, Robin Murphy <robin.murphy@arm.com>,
linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
Tomasz Figa <tfiga@google.com>,
iommu@lists.linux-foundation.org,
linux-mediatek@lists.infradead.org,
Matthias Brugger <matthias.bgg@gmail.com>,
ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI
Date: Mon, 20 Jul 2020 17:16:21 -0600 [thread overview]
Message-ID: <20200720231621.GA3106350@bogus> (raw)
In-Reply-To: <20200711064846.16007-5-yong.wu@mediatek.com>
On Sat, Jul 11, 2020 at 02:48:29PM +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
>
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
>
> EMI
> |
> M4U
> |
> ------------
> SMI Common
> ------------
> |
> +-------+------+------+----------------------+-------+
> | | | | ...... | |
> | | | | | |
> larb0 larb1 larb2 larb4 ...... larb19 larb20
> disp0 disp1 mdp vdec IPE IPE
>
> All the connections are HW fixed, SW can NOT adjust it.
>
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
>
> domain-id module iova-range larbs
> 0 disp 0 ~ 4G larb0/1
> 1 vcodec 4G ~ 8G larb4/5/7
> 2 cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
> 3 CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
> 4 CCU1 0x4400_0000 ~ 0x47ff_ffff larb14: port 4/5
You probably want to use dma-ranges for defining these
address restrictions.
How is the domain-id used or needed?
Rob
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
Nicolas Boichat <drinkcat@chromium.org>,
cui.zhang@mediatek.com, srv_heupstream@mediatek.com,
chao.hao@mediatek.com, Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>,
linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
Tomasz Figa <tfiga@google.com>,
iommu@lists.linux-foundation.org,
linux-mediatek@lists.infradead.org,
Matthias Brugger <matthias.bgg@gmail.com>,
ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI
Date: Mon, 20 Jul 2020 17:16:21 -0600 [thread overview]
Message-ID: <20200720231621.GA3106350@bogus> (raw)
In-Reply-To: <20200711064846.16007-5-yong.wu@mediatek.com>
On Sat, Jul 11, 2020 at 02:48:29PM +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
>
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
>
> EMI
> |
> M4U
> |
> ------------
> SMI Common
> ------------
> |
> +-------+------+------+----------------------+-------+
> | | | | ...... | |
> | | | | | |
> larb0 larb1 larb2 larb4 ...... larb19 larb20
> disp0 disp1 mdp vdec IPE IPE
>
> All the connections are HW fixed, SW can NOT adjust it.
>
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
>
> domain-id module iova-range larbs
> 0 disp 0 ~ 4G larb0/1
> 1 vcodec 4G ~ 8G larb4/5/7
> 2 cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
> 3 CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
> 4 CCU1 0x4400_0000 ~ 0x47ff_ffff larb14: port 4/5
You probably want to use dma-ranges for defining these
address restrictions.
How is the domain-id used or needed?
Rob
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: youlin.pei@mediatek.com, devicetree@vger.kernel.org,
Nicolas Boichat <drinkcat@chromium.org>,
cui.zhang@mediatek.com, srv_heupstream@mediatek.com,
chao.hao@mediatek.com, Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>,
linux-kernel@vger.kernel.org, Evan Green <evgreen@chromium.org>,
Tomasz Figa <tfiga@google.com>,
iommu@lists.linux-foundation.org,
linux-mediatek@lists.infradead.org,
Matthias Brugger <matthias.bgg@gmail.com>,
ming-fan.chen@mediatek.com, anan.sun@mediatek.com,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI
Date: Mon, 20 Jul 2020 17:16:21 -0600 [thread overview]
Message-ID: <20200720231621.GA3106350@bogus> (raw)
In-Reply-To: <20200711064846.16007-5-yong.wu@mediatek.com>
On Sat, Jul 11, 2020 at 02:48:29PM +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
>
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
>
> EMI
> |
> M4U
> |
> ------------
> SMI Common
> ------------
> |
> +-------+------+------+----------------------+-------+
> | | | | ...... | |
> | | | | | |
> larb0 larb1 larb2 larb4 ...... larb19 larb20
> disp0 disp1 mdp vdec IPE IPE
>
> All the connections are HW fixed, SW can NOT adjust it.
>
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
>
> domain-id module iova-range larbs
> 0 disp 0 ~ 4G larb0/1
> 1 vcodec 4G ~ 8G larb4/5/7
> 2 cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
> 3 CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
> 4 CCU1 0x4400_0000 ~ 0x47ff_ffff larb14: port 4/5
You probably want to use dma-ranges for defining these
address restrictions.
How is the domain-id used or needed?
Rob
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Yong Wu <yong.wu@mediatek.com>
Cc: Joerg Roedel <joro@8bytes.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
Robin Murphy <robin.murphy@arm.com>,
Will Deacon <will@kernel.org>, Evan Green <evgreen@chromium.org>,
Tomasz Figa <tfiga@google.com>,
linux-mediatek@lists.infradead.org, srv_heupstream@mediatek.com,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
iommu@lists.linux-foundation.org, youlin.pei@mediatek.com,
Nicolas Boichat <drinkcat@chromium.org>,
anan.sun@mediatek.com, cui.zhang@mediatek.com,
chao.hao@mediatek.com, ming-fan.chen@mediatek.com
Subject: Re: [PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI
Date: Mon, 20 Jul 2020 17:16:21 -0600 [thread overview]
Message-ID: <20200720231621.GA3106350@bogus> (raw)
In-Reply-To: <20200711064846.16007-5-yong.wu@mediatek.com>
On Sat, Jul 11, 2020 at 02:48:29PM +0800, Yong Wu wrote:
> This patch adds decriptions for mt8192 IOMMU and SMI.
>
> mt8192 also is MTK IOMMU gen2 which uses ARM Short-Descriptor translation
> table format. The M4U-SMI HW diagram is as below:
>
> EMI
> |
> M4U
> |
> ------------
> SMI Common
> ------------
> |
> +-------+------+------+----------------------+-------+
> | | | | ...... | |
> | | | | | |
> larb0 larb1 larb2 larb4 ...... larb19 larb20
> disp0 disp1 mdp vdec IPE IPE
>
> All the connections are HW fixed, SW can NOT adjust it.
>
> mt8192 M4U support 0~16GB iova range. we preassign different engines
> into different iova ranges:
>
> domain-id module iova-range larbs
> 0 disp 0 ~ 4G larb0/1
> 1 vcodec 4G ~ 8G larb4/5/7
> 2 cam/mdp 8G ~ 12G larb2/9/11/13/14/16/17/18/19/20
> 3 CCU0 0x4000_0000 ~ 0x43ff_ffff larb13: port 9/10
> 4 CCU1 0x4400_0000 ~ 0x47ff_ffff larb14: port 4/5
You probably want to use dma-ranges for defining these
address restrictions.
How is the domain-id used or needed?
Rob
next prev parent reply other threads:[~2020-07-20 23:16 UTC|newest]
Thread overview: 167+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-11 6:48 [PATCH 00/21] MT8192 IOMMU support Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 01/21] dt-binding: memory: mediatek: Add a common larb-port header file Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-12 18:06 ` Matthias Brugger
2020-07-12 18:06 ` Matthias Brugger
2020-07-12 18:06 ` Matthias Brugger
2020-07-12 18:06 ` Matthias Brugger
2020-07-13 5:43 ` Pi-Hsun Shih
2020-07-13 5:43 ` Pi-Hsun Shih
2020-07-13 5:43 ` Pi-Hsun Shih
2020-07-13 5:43 ` Pi-Hsun Shih
2020-07-13 6:28 ` Yong Wu
2020-07-13 6:28 ` Yong Wu
2020-07-13 6:28 ` Yong Wu
2020-07-13 6:28 ` Yong Wu
2020-07-13 6:27 ` [SPAM]Re: " Yong Wu
2020-07-13 6:27 ` Yong Wu
2020-07-13 6:27 ` Yong Wu
2020-07-20 22:58 ` Rob Herring
2020-07-20 22:58 ` Rob Herring
2020-07-20 22:58 ` Rob Herring
2020-07-20 22:58 ` Rob Herring
2020-07-11 6:48 ` [PATCH 02/21] dt-binding: memory: mediatek: Extend LARB_NR_MAX to 32 Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-20 22:59 ` Rob Herring
2020-07-20 22:59 ` Rob Herring
2020-07-20 22:59 ` Rob Herring
2020-07-20 22:59 ` Rob Herring
2020-07-11 6:48 ` [PATCH 03/21] dt-binding: memory: mediatek: Add domain definition Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 04/21] dt-binding: mediatek: Add binding for mt8192 IOMMU and SMI Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-13 5:36 ` Pi-Hsun Shih
2020-07-13 5:36 ` Pi-Hsun Shih
2020-07-13 5:36 ` Pi-Hsun Shih
2020-07-13 5:36 ` Pi-Hsun Shih
2020-07-13 6:54 ` Yong Wu
2020-07-13 6:54 ` Yong Wu
2020-07-13 6:54 ` Yong Wu
2020-07-13 6:54 ` Yong Wu
2020-07-20 23:16 ` Rob Herring [this message]
2020-07-20 23:16 ` Rob Herring
2020-07-20 23:16 ` Rob Herring
2020-07-20 23:16 ` Rob Herring
2020-07-21 3:27 ` Yong Wu
2020-07-21 3:27 ` Yong Wu
2020-07-21 3:27 ` Yong Wu
2020-07-21 3:27 ` Yong Wu
2020-07-11 6:48 ` [PATCH 05/21] iommu/mediatek: Use the common mtk-smi-larb-port.h Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 06/21] iommu/io-pgtable-arm-v7s: Use ias to check the valid iova in unmap Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-13 0:38 ` Nicolas Boichat
2020-07-13 0:38 ` Nicolas Boichat
2020-07-13 0:38 ` Nicolas Boichat
2020-07-13 0:38 ` Nicolas Boichat
2020-07-13 6:52 ` Yong Wu
2020-07-13 6:52 ` Yong Wu
2020-07-13 6:52 ` Yong Wu
2020-07-13 6:52 ` Yong Wu
2020-07-11 6:48 ` [PATCH 07/21] iommu/io-pgtable-arm-v7s: Extend PA34 for MediaTek Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 08/21] iommu/io-pgtable-arm-v7s: Add cfg as a param in some macros Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 09/21] iommu/io-pgtable-arm-v7s: Quad lvl1 pgtable for MediaTek Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 10/21] iommu/mediatek: Add device link for smi-common and m4u Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 11/21] iommu/mediatek: Add power-domain operation Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-13 7:03 ` Pi-Hsun Shih
2020-07-13 7:03 ` Pi-Hsun Shih
2020-07-13 7:03 ` Pi-Hsun Shih
2020-07-13 7:03 ` Pi-Hsun Shih
2020-07-14 9:33 ` Yong Wu
2020-07-14 9:33 ` Yong Wu
2020-07-14 9:33 ` Yong Wu
2020-07-14 9:33 ` Yong Wu
2020-07-27 8:49 ` chao hao
2020-07-27 8:49 ` chao hao
2020-07-27 8:49 ` chao hao
2020-07-27 8:49 ` chao hao
2020-08-07 2:13 ` Yong Wu
2020-08-07 2:13 ` Yong Wu
2020-08-07 2:13 ` Yong Wu
2020-08-07 2:13 ` Yong Wu
2020-07-11 6:48 ` [PATCH 12/21] iommu/mediatek: Add iova reserved function Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-13 7:33 ` Pi-Hsun Shih
2020-07-13 7:33 ` Pi-Hsun Shih
2020-07-13 7:33 ` Pi-Hsun Shih
2020-07-13 7:33 ` Pi-Hsun Shih
2020-07-14 9:32 ` Yong Wu
2020-07-14 9:32 ` Yong Wu
2020-07-14 9:32 ` Yong Wu
2020-07-14 9:32 ` Yong Wu
2020-07-11 6:48 ` [PATCH 13/21] iommu/mediatek: Make MTK_IOMMU depend on ARM64 Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 14/21] iommu/mediatek: Add single domain Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 15/21] iommu/mediatek: Support master use iova over 32bit Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 16/21] iommu/mediatek: Support up to 34bit iova in tlb invalid Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 17/21] iommu/mediatek: Support report iova 34bit translation fault in ISR Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 18/21] iommu/mediatek: Add support for multi domain Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-23 20:47 ` Rob Herring
2020-07-23 20:47 ` Rob Herring
2020-07-23 20:47 ` Rob Herring
2020-07-23 20:47 ` Rob Herring
2020-07-27 6:41 ` Yong Wu
2020-07-27 6:41 ` Yong Wu
2020-07-27 6:41 ` Yong Wu
2020-07-27 6:41 ` Yong Wu
2020-07-11 6:48 ` [PATCH 19/21] iommu/mediatek: Adjust the structure Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 20/21] iommu/mediatek: Add mt8192 support Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` [PATCH 21/21] memory: mtk-smi: " Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
2020-07-11 6:48 ` Yong Wu
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