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From: Joerg Roedel <joro@8bytes.org>
To: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Ashok Raj <ashok.raj@intel.com>,
	iommu@lists.linux-foundation.org, stable@vger.kernel.org,
	linux-kernel@vger.kernel.org, Koba Ko <koba.ko@canonical.com>,
	Jun Miao <jun.miao@windriver.com>
Subject: Re: [PATCH v2 1/1] iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu
Date: Fri, 24 Jul 2020 14:34:20 +0200	[thread overview]
Message-ID: <20200724123420.GU27672@8bytes.org> (raw)
In-Reply-To: <20200723013437.2268-1-baolu.lu@linux.intel.com>

On Thu, Jul 23, 2020 at 09:34:37AM +0800, Lu Baolu wrote:
> The VT-d spec requires (10.4.4 Global Command Register, TE field) that:
> 
> Hardware implementations supporting DMA draining must drain any in-flight
> DMA read/write requests queued within the Root-Complex before completing
> the translation enable command and reflecting the status of the command
> through the TES field in the Global Status register.
> 
> Unfortunately, some integrated graphic devices fail to do so after some
> kind of power state transition. As the result, the system might stuck in
> iommu_disable_translation(), waiting for the completion of TE transition.
> 
> This provides a quirk list for those devices and skips TE disabling if
> the qurik hits.
> 
> Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=208363
> Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=206571
> Tested-by: Koba Ko <koba.ko@canonical.com>
> Tested-by: Jun Miao <jun.miao@windriver.com>
> Cc: Ashok Raj <ashok.raj@intel.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>

Applied for v5.9, thanks.

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WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org>
To: Lu Baolu <baolu.lu@linux.intel.com>
Cc: Koba Ko <koba.ko@canonical.com>,
	Jun Miao <jun.miao@windriver.com>,
	iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org,
	Ashok Raj <ashok.raj@intel.com>,
	stable@vger.kernel.org
Subject: Re: [PATCH v2 1/1] iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu
Date: Fri, 24 Jul 2020 14:34:20 +0200	[thread overview]
Message-ID: <20200724123420.GU27672@8bytes.org> (raw)
In-Reply-To: <20200723013437.2268-1-baolu.lu@linux.intel.com>

On Thu, Jul 23, 2020 at 09:34:37AM +0800, Lu Baolu wrote:
> The VT-d spec requires (10.4.4 Global Command Register, TE field) that:
> 
> Hardware implementations supporting DMA draining must drain any in-flight
> DMA read/write requests queued within the Root-Complex before completing
> the translation enable command and reflecting the status of the command
> through the TES field in the Global Status register.
> 
> Unfortunately, some integrated graphic devices fail to do so after some
> kind of power state transition. As the result, the system might stuck in
> iommu_disable_translation(), waiting for the completion of TE transition.
> 
> This provides a quirk list for those devices and skips TE disabling if
> the qurik hits.
> 
> Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=208363
> Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=206571
> Tested-by: Koba Ko <koba.ko@canonical.com>
> Tested-by: Jun Miao <jun.miao@windriver.com>
> Cc: Ashok Raj <ashok.raj@intel.com>
> Cc: stable@vger.kernel.org
> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com>

Applied for v5.9, thanks.


  reply	other threads:[~2020-07-24 12:34 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-23  1:34 [PATCH v2 1/1] iommu/vt-d: Skip TE disabling on quirky gfx dedicated iommu Lu Baolu
2020-07-23  1:34 ` Lu Baolu
2020-07-24 12:34 ` Joerg Roedel [this message]
2020-07-24 12:34   ` Joerg Roedel

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