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From: Sam Ravnborg <sam@ravnborg.org>
To: Paul Cercueil <paul@crapouillou.net>
Cc: David Airlie <airlied@linux.ie>,
	od@zcrc.me, dri-devel@lists.freedesktop.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] drm/ingenic: ipu: Only restart manually on older SoCs
Date: Thu, 30 Jul 2020 07:27:02 +0200	[thread overview]
Message-ID: <20200730052702.GA1429781@ravnborg.org> (raw)
In-Reply-To: <20200730014626.83895-2-paul@crapouillou.net>

On Thu, Jul 30, 2020 at 03:46:24AM +0200, Paul Cercueil wrote:
> On older SoCs, it is necessary to restart manually the IPU when a frame
> is done processing. Doing so on newer SoCs (JZ4760/70) kinds of work
> too, until the input or output resolutions or the framerate are too
> high.
> 
> Make it work properly on newer SoCs by letting the LCD controller
> trigger the IPU frame restart signal.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> ---
>  drivers/gpu/drm/ingenic/ingenic-ipu.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c b/drivers/gpu/drm/ingenic/ingenic-ipu.c
> index 7a0a8bd865d3..7eae56fa92ea 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-ipu.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-ipu.c
> @@ -35,6 +35,7 @@ struct soc_info {
>  	const u32 *formats;
>  	size_t num_formats;
>  	bool has_bicubic;
> +	bool manual_restart;
>  
>  	void (*set_coefs)(struct ingenic_ipu *ipu, unsigned int reg,
>  			  unsigned int sharpness, bool downscale,
> @@ -645,7 +646,8 @@ static irqreturn_t ingenic_ipu_irq_handler(int irq, void *arg)
>  	unsigned int dummy;
>  
>  	/* dummy read allows CPU to reconfigure IPU */
> -	regmap_read(ipu->map, JZ_REG_IPU_STATUS, &dummy);
> +	if (ipu->soc_info->manual_restart)
> +		regmap_read(ipu->map, JZ_REG_IPU_STATUS, &dummy);
>  
>  	/* ACK interrupt */
>  	regmap_write(ipu->map, JZ_REG_IPU_STATUS, 0);
> @@ -656,7 +658,8 @@ static irqreturn_t ingenic_ipu_irq_handler(int irq, void *arg)
>  	regmap_write(ipu->map, JZ_REG_IPU_V_ADDR, ipu->addr_v);
>  
>  	/* Run IPU for the new frame */
> -	regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RUN);
> +	if (ipu->soc_info->manual_restart)
> +		regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RUN);
>  
>  	drm_crtc_handle_vblank(crtc);
>  
> @@ -806,6 +809,7 @@ static const struct soc_info jz4725b_soc_info = {
>  	.formats	= jz4725b_ipu_formats,
>  	.num_formats	= ARRAY_SIZE(jz4725b_ipu_formats),
>  	.has_bicubic	= false,
> +	.manual_restart	= true,
>  	.set_coefs	= jz4725b_set_coefs,
>  };
>  
> @@ -831,6 +835,7 @@ static const struct soc_info jz4760_soc_info = {
>  	.formats	= jz4760_ipu_formats,
>  	.num_formats	= ARRAY_SIZE(jz4760_ipu_formats),
>  	.has_bicubic	= true,
> +	.manual_restart	= false,
>  	.set_coefs	= jz4760_set_coefs,
>  };
>  
> -- 
> 2.27.0
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WARNING: multiple messages have this Message-ID (diff)
From: Sam Ravnborg <sam@ravnborg.org>
To: Paul Cercueil <paul@crapouillou.net>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	od@zcrc.me, dri-devel@lists.freedesktop.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/3] drm/ingenic: ipu: Only restart manually on older SoCs
Date: Thu, 30 Jul 2020 07:27:02 +0200	[thread overview]
Message-ID: <20200730052702.GA1429781@ravnborg.org> (raw)
In-Reply-To: <20200730014626.83895-2-paul@crapouillou.net>

On Thu, Jul 30, 2020 at 03:46:24AM +0200, Paul Cercueil wrote:
> On older SoCs, it is necessary to restart manually the IPU when a frame
> is done processing. Doing so on newer SoCs (JZ4760/70) kinds of work
> too, until the input or output resolutions or the framerate are too
> high.
> 
> Make it work properly on newer SoCs by letting the LCD controller
> trigger the IPU frame restart signal.
> 
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
> ---
>  drivers/gpu/drm/ingenic/ingenic-ipu.c | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/ingenic/ingenic-ipu.c b/drivers/gpu/drm/ingenic/ingenic-ipu.c
> index 7a0a8bd865d3..7eae56fa92ea 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-ipu.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-ipu.c
> @@ -35,6 +35,7 @@ struct soc_info {
>  	const u32 *formats;
>  	size_t num_formats;
>  	bool has_bicubic;
> +	bool manual_restart;
>  
>  	void (*set_coefs)(struct ingenic_ipu *ipu, unsigned int reg,
>  			  unsigned int sharpness, bool downscale,
> @@ -645,7 +646,8 @@ static irqreturn_t ingenic_ipu_irq_handler(int irq, void *arg)
>  	unsigned int dummy;
>  
>  	/* dummy read allows CPU to reconfigure IPU */
> -	regmap_read(ipu->map, JZ_REG_IPU_STATUS, &dummy);
> +	if (ipu->soc_info->manual_restart)
> +		regmap_read(ipu->map, JZ_REG_IPU_STATUS, &dummy);
>  
>  	/* ACK interrupt */
>  	regmap_write(ipu->map, JZ_REG_IPU_STATUS, 0);
> @@ -656,7 +658,8 @@ static irqreturn_t ingenic_ipu_irq_handler(int irq, void *arg)
>  	regmap_write(ipu->map, JZ_REG_IPU_V_ADDR, ipu->addr_v);
>  
>  	/* Run IPU for the new frame */
> -	regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RUN);
> +	if (ipu->soc_info->manual_restart)
> +		regmap_set_bits(ipu->map, JZ_REG_IPU_CTRL, JZ_IPU_CTRL_RUN);
>  
>  	drm_crtc_handle_vblank(crtc);
>  
> @@ -806,6 +809,7 @@ static const struct soc_info jz4725b_soc_info = {
>  	.formats	= jz4725b_ipu_formats,
>  	.num_formats	= ARRAY_SIZE(jz4725b_ipu_formats),
>  	.has_bicubic	= false,
> +	.manual_restart	= true,
>  	.set_coefs	= jz4725b_set_coefs,
>  };
>  
> @@ -831,6 +835,7 @@ static const struct soc_info jz4760_soc_info = {
>  	.formats	= jz4760_ipu_formats,
>  	.num_formats	= ARRAY_SIZE(jz4760_ipu_formats),
>  	.has_bicubic	= true,
> +	.manual_restart	= false,
>  	.set_coefs	= jz4760_set_coefs,
>  };
>  
> -- 
> 2.27.0

  reply	other threads:[~2020-07-30  5:27 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-30  1:46 [PATCH 0/3] More ingenic-drm IPU cleanups Paul Cercueil
2020-07-30  1:46 ` Paul Cercueil
2020-07-30  1:46 ` [PATCH 1/3] drm/ingenic: ipu: Only restart manually on older SoCs Paul Cercueil
2020-07-30  1:46   ` Paul Cercueil
2020-07-30  5:27   ` Sam Ravnborg [this message]
2020-07-30  5:27     ` Sam Ravnborg
2020-07-30  1:46 ` [PATCH 2/3] drm/ingenic: ipu: Remove YUV422 from supported formats on JZ4725B Paul Cercueil
2020-07-30  1:46   ` Paul Cercueil
2020-07-30  5:30   ` Sam Ravnborg
2020-07-30  5:30     ` Sam Ravnborg
2020-07-30  1:46 ` [PATCH 3/3] drm/ingenic: ipu: Only enable clock when needed Paul Cercueil
2020-07-30  1:46   ` Paul Cercueil
2020-07-30  5:33   ` Sam Ravnborg
2020-07-30  5:33     ` Sam Ravnborg

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