* [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
@ 2020-08-07 21:34 ` Lyude Paul
0 siblings, 0 replies; 14+ messages in thread
From: Lyude Paul @ 2020-08-07 21:34 UTC (permalink / raw)
To: nouveau
Cc: stable, Ben Skeggs, David Airlie, Daniel Vetter,
Christian König, Nirmoy Das,
open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS, open list
Not entirely sure why this never came up when I originally tested this
(maybe some BIOSes already have this setup?) but the ->caps_init vfunc
appears to cause the display engine to throw an exception on driver
init, at least on my ThinkPad P72:
nouveau 0000:01:00.0: disp: chid 0 mthd 008c data 00000000 0000508c 0000102b
This is magic nvidia speak for "You need to have the DMA notifier offset
programmed before you can call NV507D_GET_CAPABILITIES." So, let's fix
this by doing that, and also perform an update afterwards to prevent
racing with the GPU when reading capabilities.
Changes since v1:
* Don't just program the DMA notifier offset, make sure to actually
perform an update
Signed-off-by: Lyude Paul <lyude@redhat.com>
Fixes: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support")
Cc: <stable@vger.kernel.org> # v5.8+
---
drivers/gpu/drm/nouveau/dispnv50/core507d.c | 22 +++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
index ad1f09a143aa4..fc4bf9ca59f85 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/core507d.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
@@ -77,14 +77,32 @@ core507d_ntfy_init(struct nouveau_bo *bo, u32 offset)
int
core507d_caps_init(struct nouveau_drm *drm, struct nv50_disp *disp)
{
+ struct nv50_core *core = disp->core;
struct nvif_push *push = disp->core->chan.push;
+ u32 interlock[NV50_DISP_INTERLOCK__SIZE] = {0};
int ret;
- if ((ret = PUSH_WAIT(push, 2)))
+ core->func->ntfy_init(disp->sync, NV50_DISP_CORE_NTFY);
+
+ if ((ret = PUSH_WAIT(push, 4)))
return ret;
+ PUSH_MTHD(push, NV507D, SET_NOTIFIER_CONTROL,
+ NVDEF(NV507D, SET_NOTIFIER_CONTROL, MODE, WRITE) |
+ NVVAL(NV507D, SET_NOTIFIER_CONTROL, OFFSET, NV50_DISP_CORE_NTFY >> 2) |
+ NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE));
PUSH_MTHD(push, NV507D, GET_CAPABILITIES, 0x00000000);
- return PUSH_KICK(push);
+
+ ret = PUSH_KICK(push);
+ if (ret)
+ return ret;
+
+ core->func->update(core, interlock, false);
+ if (core->func->ntfy_wait_done(disp->sync, NV50_DISP_CORE_NTFY,
+ core->chan.base.device))
+ NV_ERROR(drm, "core notifier timeout\n");
+
+ return 0;
}
int
--
2.26.2
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
@ 2020-08-07 21:34 ` Lyude Paul
0 siblings, 0 replies; 14+ messages in thread
From: Lyude Paul @ 2020-08-07 21:34 UTC (permalink / raw)
To: nouveau
Cc: David Airlie, open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS,
open list, stable, Ben Skeggs, Christian König, Nirmoy Das
Not entirely sure why this never came up when I originally tested this
(maybe some BIOSes already have this setup?) but the ->caps_init vfunc
appears to cause the display engine to throw an exception on driver
init, at least on my ThinkPad P72:
nouveau 0000:01:00.0: disp: chid 0 mthd 008c data 00000000 0000508c 0000102b
This is magic nvidia speak for "You need to have the DMA notifier offset
programmed before you can call NV507D_GET_CAPABILITIES." So, let's fix
this by doing that, and also perform an update afterwards to prevent
racing with the GPU when reading capabilities.
Changes since v1:
* Don't just program the DMA notifier offset, make sure to actually
perform an update
Signed-off-by: Lyude Paul <lyude@redhat.com>
Fixes: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support")
Cc: <stable@vger.kernel.org> # v5.8+
---
drivers/gpu/drm/nouveau/dispnv50/core507d.c | 22 +++++++++++++++++++--
1 file changed, 20 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/core507d.c b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
index ad1f09a143aa4..fc4bf9ca59f85 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/core507d.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/core507d.c
@@ -77,14 +77,32 @@ core507d_ntfy_init(struct nouveau_bo *bo, u32 offset)
int
core507d_caps_init(struct nouveau_drm *drm, struct nv50_disp *disp)
{
+ struct nv50_core *core = disp->core;
struct nvif_push *push = disp->core->chan.push;
+ u32 interlock[NV50_DISP_INTERLOCK__SIZE] = {0};
int ret;
- if ((ret = PUSH_WAIT(push, 2)))
+ core->func->ntfy_init(disp->sync, NV50_DISP_CORE_NTFY);
+
+ if ((ret = PUSH_WAIT(push, 4)))
return ret;
+ PUSH_MTHD(push, NV507D, SET_NOTIFIER_CONTROL,
+ NVDEF(NV507D, SET_NOTIFIER_CONTROL, MODE, WRITE) |
+ NVVAL(NV507D, SET_NOTIFIER_CONTROL, OFFSET, NV50_DISP_CORE_NTFY >> 2) |
+ NVDEF(NV507D, SET_NOTIFIER_CONTROL, NOTIFY, ENABLE));
PUSH_MTHD(push, NV507D, GET_CAPABILITIES, 0x00000000);
- return PUSH_KICK(push);
+
+ ret = PUSH_KICK(push);
+ if (ret)
+ return ret;
+
+ core->func->update(core, interlock, false);
+ if (core->func->ntfy_wait_done(disp->sync, NV50_DISP_CORE_NTFY,
+ core->chan.base.device))
+ NV_ERROR(drm, "core notifier timeout\n");
+
+ return 0;
}
int
--
2.26.2
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v2 2/2] drm/nouveau/kms/nv50-: Log SOR/PIOR caps
2020-08-07 21:34 ` Lyude Paul
(?)
@ 2020-08-07 21:34 ` Lyude Paul
-1 siblings, 0 replies; 14+ messages in thread
From: Lyude Paul @ 2020-08-07 21:34 UTC (permalink / raw)
To: nouveau
Cc: Ben Skeggs, David Airlie, Daniel Vetter, Dave Airlie,
Alex Deucher, Pankaj Bharadiya, Takashi Iwai, James Jones,
open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS, open list
Since I'm almost certain I didn't get capability checking right for
pre-volta chipsets, let's start logging any caps we find to make things
like this obvious in the future.
Signed-off-by: Lyude Paul <lyude@redhat.com>
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index e7874877da858..acf1aa51b3568 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -297,6 +297,14 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
/******************************************************************************
* Output path helpers
*****************************************************************************/
+static void
+nv50_outp_dump_caps(struct nouveau_drm *drm,
+ struct nouveau_encoder *outp)
+{
+ NV_DEBUG(drm, "%s caps: dp_interlace=%d\n",
+ outp->base.base.name, outp->caps.dp_interlace);
+}
+
static void
nv50_outp_release(struct nouveau_encoder *nv_encoder)
{
@@ -1781,6 +1789,7 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe)
drm_connector_attach_encoder(connector, encoder);
disp->core->func->sor->get_caps(disp, nv_encoder, ffs(dcbe->or) - 1);
+ nv50_outp_dump_caps(drm, nv_encoder);
if (dcbe->type == DCB_OUTPUT_DP) {
struct nvkm_i2c_aux *aux =
@@ -1949,6 +1958,7 @@ nv50_pior_create(struct drm_connector *connector, struct dcb_output *dcbe)
drm_connector_attach_encoder(connector, encoder);
disp->core->func->pior->get_caps(disp, nv_encoder, ffs(dcbe->or) - 1);
+ nv50_outp_dump_caps(drm, nv_encoder);
return 0;
}
--
2.26.2
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v2 2/2] drm/nouveau/kms/nv50-: Log SOR/PIOR caps
@ 2020-08-07 21:34 ` Lyude Paul
0 siblings, 0 replies; 14+ messages in thread
From: Lyude Paul @ 2020-08-07 21:34 UTC (permalink / raw)
To: nouveau
Cc: Ben Skeggs, David Airlie, Daniel Vetter, Dave Airlie,
Alex Deucher, Pankaj Bharadiya, Takashi Iwai, James Jones,
open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS, open list
Since I'm almost certain I didn't get capability checking right for
pre-volta chipsets, let's start logging any caps we find to make things
like this obvious in the future.
Signed-off-by: Lyude Paul <lyude@redhat.com>
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index e7874877da858..acf1aa51b3568 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -297,6 +297,14 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
/******************************************************************************
* Output path helpers
*****************************************************************************/
+static void
+nv50_outp_dump_caps(struct nouveau_drm *drm,
+ struct nouveau_encoder *outp)
+{
+ NV_DEBUG(drm, "%s caps: dp_interlace=%d\n",
+ outp->base.base.name, outp->caps.dp_interlace);
+}
+
static void
nv50_outp_release(struct nouveau_encoder *nv_encoder)
{
@@ -1781,6 +1789,7 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe)
drm_connector_attach_encoder(connector, encoder);
disp->core->func->sor->get_caps(disp, nv_encoder, ffs(dcbe->or) - 1);
+ nv50_outp_dump_caps(drm, nv_encoder);
if (dcbe->type == DCB_OUTPUT_DP) {
struct nvkm_i2c_aux *aux =
@@ -1949,6 +1958,7 @@ nv50_pior_create(struct drm_connector *connector, struct dcb_output *dcbe)
drm_connector_attach_encoder(connector, encoder);
disp->core->func->pior->get_caps(disp, nv_encoder, ffs(dcbe->or) - 1);
+ nv50_outp_dump_caps(drm, nv_encoder);
return 0;
}
--
2.26.2
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH v2 2/2] drm/nouveau/kms/nv50-: Log SOR/PIOR caps
@ 2020-08-07 21:34 ` Lyude Paul
0 siblings, 0 replies; 14+ messages in thread
From: Lyude Paul @ 2020-08-07 21:34 UTC (permalink / raw)
To: nouveau
Cc: David Airlie, Pankaj Bharadiya, James Jones, open list,
open list:DRM DRIVER FOR NVIDIA GEFORCE/QUADRO GPUS, Ben Skeggs,
Alex Deucher
Since I'm almost certain I didn't get capability checking right for
pre-volta chipsets, let's start logging any caps we find to make things
like this obvious in the future.
Signed-off-by: Lyude Paul <lyude@redhat.com>
---
drivers/gpu/drm/nouveau/dispnv50/disp.c | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c b/drivers/gpu/drm/nouveau/dispnv50/disp.c
index e7874877da858..acf1aa51b3568 100644
--- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
+++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
@@ -297,6 +297,14 @@ nv50_dmac_create(struct nvif_device *device, struct nvif_object *disp,
/******************************************************************************
* Output path helpers
*****************************************************************************/
+static void
+nv50_outp_dump_caps(struct nouveau_drm *drm,
+ struct nouveau_encoder *outp)
+{
+ NV_DEBUG(drm, "%s caps: dp_interlace=%d\n",
+ outp->base.base.name, outp->caps.dp_interlace);
+}
+
static void
nv50_outp_release(struct nouveau_encoder *nv_encoder)
{
@@ -1781,6 +1789,7 @@ nv50_sor_create(struct drm_connector *connector, struct dcb_output *dcbe)
drm_connector_attach_encoder(connector, encoder);
disp->core->func->sor->get_caps(disp, nv_encoder, ffs(dcbe->or) - 1);
+ nv50_outp_dump_caps(drm, nv_encoder);
if (dcbe->type == DCB_OUTPUT_DP) {
struct nvkm_i2c_aux *aux =
@@ -1949,6 +1958,7 @@ nv50_pior_create(struct drm_connector *connector, struct dcb_output *dcbe)
drm_connector_attach_encoder(connector, encoder);
disp->core->func->pior->get_caps(disp, nv_encoder, ffs(dcbe->or) - 1);
+ nv50_outp_dump_caps(drm, nv_encoder);
return 0;
}
--
2.26.2
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
2020-08-07 21:34 ` Lyude Paul
@ 2020-08-13 16:25 ` Sasha Levin
-1 siblings, 0 replies; 14+ messages in thread
From: Sasha Levin @ 2020-08-13 16:25 UTC (permalink / raw)
To: Sasha Levin, Lyude Paul, nouveau; +Cc: stable, Ben Skeggs
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support").
The bot has tested the following trees: v5.8.
v5.8: Failed to apply! Possible dependencies:
3c43c362b3a5 ("drm/nouveau/kms/nv50-: convert core caps_init() to new push macros")
5e691222eac6 ("drm/nouveau/kms/nv50-: convert core init() to new push macros")
d8b24526ef68 ("drm/nouveau/kms/nv50-: use NVIDIA's headers for core caps_init()")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
@ 2020-08-13 16:25 ` Sasha Levin
0 siblings, 0 replies; 14+ messages in thread
From: Sasha Levin @ 2020-08-13 16:25 UTC (permalink / raw)
To: Sasha Levin, Lyude Paul, nouveau; +Cc: stable, Ben Skeggs, stable
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support").
The bot has tested the following trees: v5.8.
v5.8: Failed to apply! Possible dependencies:
3c43c362b3a5 ("drm/nouveau/kms/nv50-: convert core caps_init() to new push macros")
5e691222eac6 ("drm/nouveau/kms/nv50-: convert core init() to new push macros")
d8b24526ef68 ("drm/nouveau/kms/nv50-: use NVIDIA's headers for core caps_init()")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
2020-08-07 21:34 ` Lyude Paul
` (3 preceding siblings ...)
(?)
@ 2020-08-19 23:56 ` Sasha Levin
-1 siblings, 0 replies; 14+ messages in thread
From: Sasha Levin @ 2020-08-19 23:56 UTC (permalink / raw)
To: Sasha Levin, Lyude Paul, nouveau; +Cc: stable, Ben Skeggs
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support").
The bot has tested the following trees: v5.8.1.
v5.8.1: Failed to apply! Possible dependencies:
3c43c362b3a5 ("drm/nouveau/kms/nv50-: convert core caps_init() to new push macros")
5e691222eac6 ("drm/nouveau/kms/nv50-: convert core init() to new push macros")
d8b24526ef68 ("drm/nouveau/kms/nv50-: use NVIDIA's headers for core caps_init()")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
^ permalink raw reply [flat|nested] 14+ messages in thread[parent not found: <20200807213405.442877-1-lyude-H+wXaHxf7aLQT0dZR+AlfA@public.gmane.org>]
* Re: [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
2020-08-07 21:34 ` Lyude Paul
@ 2020-08-19 23:56 ` Sasha Levin
-1 siblings, 0 replies; 14+ messages in thread
From: Sasha Levin @ 2020-08-19 23:56 UTC (permalink / raw)
To: Sasha Levin, Lyude Paul, nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Ben Skeggs, stable-u79uwXL29TY76Z2rM5mHXA
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support").
The bot has tested the following trees: v5.8.1.
v5.8.1: Failed to apply! Possible dependencies:
3c43c362b3a5 ("drm/nouveau/kms/nv50-: convert core caps_init() to new push macros")
5e691222eac6 ("drm/nouveau/kms/nv50-: convert core init() to new push macros")
d8b24526ef68 ("drm/nouveau/kms/nv50-: use NVIDIA's headers for core caps_init()")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
@ 2020-08-19 23:56 ` Sasha Levin
0 siblings, 0 replies; 14+ messages in thread
From: Sasha Levin @ 2020-08-19 23:56 UTC (permalink / raw)
To: Sasha Levin, Lyude Paul, nouveau; +Cc: stable, Ben Skeggs, stable
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support").
The bot has tested the following trees: v5.8.1.
v5.8.1: Failed to apply! Possible dependencies:
3c43c362b3a5 ("drm/nouveau/kms/nv50-: convert core caps_init() to new push macros")
5e691222eac6 ("drm/nouveau/kms/nv50-: convert core init() to new push macros")
d8b24526ef68 ("drm/nouveau/kms/nv50-: use NVIDIA's headers for core caps_init()")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
2020-08-07 21:34 ` Lyude Paul
@ 2020-08-26 13:53 ` Sasha Levin
-1 siblings, 0 replies; 14+ messages in thread
From: Sasha Levin @ 2020-08-26 13:53 UTC (permalink / raw)
To: Sasha Levin, Lyude Paul, nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW
Cc: Ben Skeggs, stable-u79uwXL29TY76Z2rM5mHXA
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support").
The bot has tested the following trees: v5.8.2.
v5.8.2: Failed to apply! Possible dependencies:
3c43c362b3a5 ("drm/nouveau/kms/nv50-: convert core caps_init() to new push macros")
5e691222eac6 ("drm/nouveau/kms/nv50-: convert core init() to new push macros")
d8b24526ef68 ("drm/nouveau/kms/nv50-: use NVIDIA's headers for core caps_init()")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
@ 2020-08-26 13:53 ` Sasha Levin
0 siblings, 0 replies; 14+ messages in thread
From: Sasha Levin @ 2020-08-26 13:53 UTC (permalink / raw)
To: Sasha Levin, Lyude Paul, nouveau; +Cc: stable, Ben Skeggs, stable
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support").
The bot has tested the following trees: v5.8.2.
v5.8.2: Failed to apply! Possible dependencies:
3c43c362b3a5 ("drm/nouveau/kms/nv50-: convert core caps_init() to new push macros")
5e691222eac6 ("drm/nouveau/kms/nv50-: convert core init() to new push macros")
d8b24526ef68 ("drm/nouveau/kms/nv50-: use NVIDIA's headers for core caps_init()")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH v2 1/2] drm/nouveau/kms/nv50-: Program notifier offset before requesting disp caps
2020-08-07 21:34 ` Lyude Paul
` (5 preceding siblings ...)
(?)
@ 2020-08-26 13:53 ` Sasha Levin
-1 siblings, 0 replies; 14+ messages in thread
From: Sasha Levin @ 2020-08-26 13:53 UTC (permalink / raw)
To: Sasha Levin, Lyude Paul, nouveau; +Cc: stable, Ben Skeggs
Hi
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag
fixing commit: 4a2cb4181b07 ("drm/nouveau/kms/nv50-: Probe SOR and PIOR caps for DP interlacing support").
The bot has tested the following trees: v5.8.2.
v5.8.2: Failed to apply! Possible dependencies:
3c43c362b3a5 ("drm/nouveau/kms/nv50-: convert core caps_init() to new push macros")
5e691222eac6 ("drm/nouveau/kms/nv50-: convert core init() to new push macros")
d8b24526ef68 ("drm/nouveau/kms/nv50-: use NVIDIA's headers for core caps_init()")
NOTE: The patch will not be queued to stable trees until it is upstream.
How should we proceed with this patch?
--
Thanks
Sasha
^ permalink raw reply [flat|nested] 14+ messages in thread