From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>,
Fabio Estevam <festevam@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
NXP Linux Team <linux-imx@nxp.com>,
Daniel Vetter <daniel@ffwll.ch>, Shawn Guo <shawnguo@kernel.org>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
linux-arm-kernel@lists.infradead.org,
Lucas Stach <l.stach@pengutronix.de>
Subject: Re: [PATCH] drm/imx/dcss: fix 64-bit divisions
Date: Fri, 11 Sep 2020 16:56:34 +0300 [thread overview]
Message-ID: <20200911135634.GI6112@intel.com> (raw)
In-Reply-To: <20200911134827.32142-1-laurentiu.palcu@oss.nxp.com>
On Fri, Sep 11, 2020 at 04:48:27PM +0300, Laurentiu Palcu wrote:
> Use div_s64() for the 64-bit divisions. This would allow the driver to compile
> on 32-bit architectures, if needed.
>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> ---
> drivers/gpu/drm/imx/dcss/dcss-scaler.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/imx/dcss/dcss-scaler.c b/drivers/gpu/drm/imx/dcss/dcss-scaler.c
> index cd21905de580..7c1e0e461244 100644
> --- a/drivers/gpu/drm/imx/dcss/dcss-scaler.c
> +++ b/drivers/gpu/drm/imx/dcss/dcss-scaler.c
> @@ -134,7 +134,7 @@ static int div_q(int A, int B)
> else
> temp -= B / 2;
>
> - result = (int)(temp / B);
> + result = (int)(div_s64(temp, B));
> return result;
> }
>
> @@ -237,7 +237,7 @@ static void dcss_scaler_gaussian_filter(int fc_q, bool use_5_taps,
> ll_temp = coef[phase][i];
> ll_temp <<= PSC_COEFF_PRECISION;
> ll_temp += sum >> 1;
> - ll_temp /= sum;
That looks like hand rolled DIV_ROUND_CLOSEST_ULL()
> + ll_temp = div_s64(ll_temp, sum);
> coef[phase][i] = (int)ll_temp;
> }
> }
> --
> 2.17.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Ville Syrjälä
Intel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
Cc: David Airlie <airlied@linux.ie>,
Sascha Hauer <s.hauer@pengutronix.de>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
NXP Linux Team <linux-imx@nxp.com>,
Shawn Guo <shawnguo@kernel.org>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH] drm/imx/dcss: fix 64-bit divisions
Date: Fri, 11 Sep 2020 16:56:34 +0300 [thread overview]
Message-ID: <20200911135634.GI6112@intel.com> (raw)
In-Reply-To: <20200911134827.32142-1-laurentiu.palcu@oss.nxp.com>
On Fri, Sep 11, 2020 at 04:48:27PM +0300, Laurentiu Palcu wrote:
> Use div_s64() for the 64-bit divisions. This would allow the driver to compile
> on 32-bit architectures, if needed.
>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> ---
> drivers/gpu/drm/imx/dcss/dcss-scaler.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/imx/dcss/dcss-scaler.c b/drivers/gpu/drm/imx/dcss/dcss-scaler.c
> index cd21905de580..7c1e0e461244 100644
> --- a/drivers/gpu/drm/imx/dcss/dcss-scaler.c
> +++ b/drivers/gpu/drm/imx/dcss/dcss-scaler.c
> @@ -134,7 +134,7 @@ static int div_q(int A, int B)
> else
> temp -= B / 2;
>
> - result = (int)(temp / B);
> + result = (int)(div_s64(temp, B));
> return result;
> }
>
> @@ -237,7 +237,7 @@ static void dcss_scaler_gaussian_filter(int fc_q, bool use_5_taps,
> ll_temp = coef[phase][i];
> ll_temp <<= PSC_COEFF_PRECISION;
> ll_temp += sum >> 1;
> - ll_temp /= sum;
That looks like hand rolled DIV_ROUND_CLOSEST_ULL()
> + ll_temp = div_s64(ll_temp, sum);
> coef[phase][i] = (int)ll_temp;
> }
> }
> --
> 2.17.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Ville Syrjälä
Intel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>,
Philipp Zabel <p.zabel@pengutronix.de>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
dri-devel@lists.freedesktop.org
Subject: Re: [PATCH] drm/imx/dcss: fix 64-bit divisions
Date: Fri, 11 Sep 2020 16:56:34 +0300 [thread overview]
Message-ID: <20200911135634.GI6112@intel.com> (raw)
In-Reply-To: <20200911134827.32142-1-laurentiu.palcu@oss.nxp.com>
On Fri, Sep 11, 2020 at 04:48:27PM +0300, Laurentiu Palcu wrote:
> Use div_s64() for the 64-bit divisions. This would allow the driver to compile
> on 32-bit architectures, if needed.
>
> Signed-off-by: Laurentiu Palcu <laurentiu.palcu@oss.nxp.com>
> ---
> drivers/gpu/drm/imx/dcss/dcss-scaler.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/imx/dcss/dcss-scaler.c b/drivers/gpu/drm/imx/dcss/dcss-scaler.c
> index cd21905de580..7c1e0e461244 100644
> --- a/drivers/gpu/drm/imx/dcss/dcss-scaler.c
> +++ b/drivers/gpu/drm/imx/dcss/dcss-scaler.c
> @@ -134,7 +134,7 @@ static int div_q(int A, int B)
> else
> temp -= B / 2;
>
> - result = (int)(temp / B);
> + result = (int)(div_s64(temp, B));
> return result;
> }
>
> @@ -237,7 +237,7 @@ static void dcss_scaler_gaussian_filter(int fc_q, bool use_5_taps,
> ll_temp = coef[phase][i];
> ll_temp <<= PSC_COEFF_PRECISION;
> ll_temp += sum >> 1;
> - ll_temp /= sum;
That looks like hand rolled DIV_ROUND_CLOSEST_ULL()
> + ll_temp = div_s64(ll_temp, sum);
> coef[phase][i] = (int)ll_temp;
> }
> }
> --
> 2.17.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
--
Ville Syrjälä
Intel
next prev parent reply other threads:[~2020-09-11 13:57 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-11 13:48 [PATCH] drm/imx/dcss: fix 64-bit divisions Laurentiu Palcu
2020-09-11 13:48 ` Laurentiu Palcu
2020-09-11 13:48 ` Laurentiu Palcu
2020-09-11 13:56 ` Ville Syrjälä [this message]
2020-09-11 13:56 ` Ville Syrjälä
2020-09-11 13:56 ` Ville Syrjälä
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