diff for duplicates of <20200915152201.GA1940827@bogus>

diff --git a/a/1.txt b/N1/1.txt
index 4349cc8..7749b6e 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -13,3 +13,8 @@ FYI, highbank_mc_edac.c is also a Cadence controller. IIRC, the register
 layout changes for every customer/design.
 
 Rob
+
+_______________________________________________
+linux-riscv mailing list
+linux-riscv@lists.infradead.org
+http://lists.infradead.org/mailman/listinfo/linux-riscv
diff --git a/a/content_digest b/N1/content_digest
index bae3cfb..1978269 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -3,19 +3,19 @@
  "Subject\0Re: [PATCH v2 0/3] SiFive DDR controller and EDAC support\0"
  "Date\0Tue, 15 Sep 2020 09:22:01 -0600\0"
  "To\0Yash Shah <yash.shah@sifive.com>\0"
- "Cc\0palmer@dabbelt.com"
-  paul.walmsley@sifive.com
-  bp@alien8.de
-  mchehab@kernel.org
+ "Cc\0devicetree@vger.kernel.org"
   tony.luck@intel.com
-  aou@eecs.berkeley.edu
   james.morse@arm.com
+  linux-kernel@vger.kernel.org
   rrichter@marvell.com
-  devicetree@vger.kernel.org
+  sachin.ghadi@sifive.com
+  aou@eecs.berkeley.edu
+  bp@alien8.de
+  paul.walmsley@sifive.com
+  palmer@dabbelt.com
   linux-riscv@lists.infradead.org
-  linux-kernel@vger.kernel.org
-  linux-edac@vger.kernel.org
- " sachin.ghadi@sifive.com\0"
+  mchehab@kernel.org
+ " linux-edac@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "On Mon, Sep 07, 2020 at 11:17:56AM +0530, Yash Shah wrote:\n"
@@ -32,6 +32,11 @@
  "FYI, highbank_mc_edac.c is also a Cadence controller. IIRC, the register \n"
  "layout changes for every customer/design.\n"
  "\n"
- Rob
+ "Rob\n"
+ "\n"
+ "_______________________________________________\n"
+ "linux-riscv mailing list\n"
+ "linux-riscv@lists.infradead.org\n"
+ http://lists.infradead.org/mailman/listinfo/linux-riscv
 
-13b4ed4b5a7a0b0019f8f371ca257e93b01db4133501adea441618c8cb6743d8
+9a6ba487622765e99edda081f9bee986b2995e4f9b2025f36eeeedd16cc254a1
