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From: Peng Liang <liangpeng10@huawei.com>
To: <kvmarm@lists.cs.columbia.edu>
Cc: zhang.zhanghailiang@huawei.com, kvm@vger.kernel.org,
	maz@kernel.org, will@kernel.org
Subject: [RFC v2 2/7] arm64: introduce check_features
Date: Thu, 17 Sep 2020 20:00:56 +0800	[thread overview]
Message-ID: <20200917120101.3438389-3-liangpeng10@huawei.com> (raw)
In-Reply-To: <20200917120101.3438389-1-liangpeng10@huawei.com>

To emulate ID registers, we need to validate the value of the register
defined by user space.  For most ID registers, we need to check whether
each field defined by user space is no more than that of host (whether
host support the corresponding features) and whether the fields are
supposed to be exposed to guest.  Introduce check_features to do those
jobs.

Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com>
Signed-off-by: Peng Liang <liangpeng10@huawei.com>
---
 arch/arm64/include/asm/cpufeature.h |  2 ++
 arch/arm64/kernel/cpufeature.c      | 23 +++++++++++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 2ba7c4f11d8a..954adc5ca72f 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -579,6 +579,8 @@ void check_local_cpu_capabilities(void);
 
 u64 read_sanitised_ftr_reg(u32 id);
 
+int check_features(u32 sys_reg, u64 val);
+
 static inline bool cpu_supports_mixed_endian_el0(void)
 {
 	return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 698b32705544..e58926992a70 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2850,3 +2850,26 @@ ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr,
 
 	return sprintf(buf, "Vulnerable\n");
 }
+
+int check_features(u32 sys_reg, u64 val)
+{
+	struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg);
+	const struct arm64_ftr_bits *ftrp;
+	u64 exposed_mask = 0;
+
+	if (!reg)
+		return -ENOENT;
+
+	for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) {
+		if (arm64_ftr_value(ftrp, reg->sys_val) <
+		    arm64_ftr_value(ftrp, val)) {
+			return -EINVAL;
+		}
+		exposed_mask |= arm64_ftr_mask(ftrp);
+	}
+
+	if (val & ~exposed_mask)
+		return -EINVAL;
+
+	return 0;
+}
-- 
2.26.2

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WARNING: multiple messages have this Message-ID (diff)
From: Peng Liang <liangpeng10@huawei.com>
To: <kvmarm@lists.cs.columbia.edu>
Cc: <kvm@vger.kernel.org>, <maz@kernel.org>, <will@kernel.org>,
	<drjones@redhat.com>, <zhang.zhanghailiang@huawei.com>,
	<xiexiangyou@huawei.com>, Peng Liang <liangpeng10@huawei.com>
Subject: [RFC v2 2/7] arm64: introduce check_features
Date: Thu, 17 Sep 2020 20:00:56 +0800	[thread overview]
Message-ID: <20200917120101.3438389-3-liangpeng10@huawei.com> (raw)
In-Reply-To: <20200917120101.3438389-1-liangpeng10@huawei.com>

To emulate ID registers, we need to validate the value of the register
defined by user space.  For most ID registers, we need to check whether
each field defined by user space is no more than that of host (whether
host support the corresponding features) and whether the fields are
supposed to be exposed to guest.  Introduce check_features to do those
jobs.

Signed-off-by: zhanghailiang <zhang.zhanghailiang@huawei.com>
Signed-off-by: Peng Liang <liangpeng10@huawei.com>
---
 arch/arm64/include/asm/cpufeature.h |  2 ++
 arch/arm64/kernel/cpufeature.c      | 23 +++++++++++++++++++++++
 2 files changed, 25 insertions(+)

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 2ba7c4f11d8a..954adc5ca72f 100644
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -579,6 +579,8 @@ void check_local_cpu_capabilities(void);
 
 u64 read_sanitised_ftr_reg(u32 id);
 
+int check_features(u32 sys_reg, u64 val);
+
 static inline bool cpu_supports_mixed_endian_el0(void)
 {
 	return id_aa64mmfr0_mixed_endian_el0(read_cpuid(ID_AA64MMFR0_EL1));
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 698b32705544..e58926992a70 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -2850,3 +2850,26 @@ ssize_t cpu_show_meltdown(struct device *dev, struct device_attribute *attr,
 
 	return sprintf(buf, "Vulnerable\n");
 }
+
+int check_features(u32 sys_reg, u64 val)
+{
+	struct arm64_ftr_reg *reg = get_arm64_ftr_reg(sys_reg);
+	const struct arm64_ftr_bits *ftrp;
+	u64 exposed_mask = 0;
+
+	if (!reg)
+		return -ENOENT;
+
+	for (ftrp = reg->ftr_bits; ftrp->width; ftrp++) {
+		if (arm64_ftr_value(ftrp, reg->sys_val) <
+		    arm64_ftr_value(ftrp, val)) {
+			return -EINVAL;
+		}
+		exposed_mask |= arm64_ftr_mask(ftrp);
+	}
+
+	if (val & ~exposed_mask)
+		return -EINVAL;
+
+	return 0;
+}
-- 
2.26.2


  parent reply	other threads:[~2020-09-17 12:09 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-17 12:00 [RFC v2 0/7] kvm: arm64: emulate ID registers Peng Liang
2020-09-17 12:00 ` Peng Liang
2020-09-17 12:00 ` [RFC v2 1/7] arm64: add a helper function to traverse arm64_ftr_regs Peng Liang
2020-09-17 12:00   ` Peng Liang
2020-09-18  7:18   ` Andrew Jones
2020-09-18  7:18     ` Andrew Jones
2020-09-18  9:24     ` Peng Liang
2020-09-18  9:24       ` Peng Liang
2020-09-18 10:28       ` Andrew Jones
2020-09-18 10:28         ` Andrew Jones
2020-09-18 11:58         ` Peng Liang
2020-09-18 11:58           ` Peng Liang
2020-09-17 12:00 ` Peng Liang [this message]
2020-09-17 12:00   ` [RFC v2 2/7] arm64: introduce check_features Peng Liang
2020-09-18  7:30   ` Andrew Jones
2020-09-18  7:30     ` Andrew Jones
2020-09-18  9:25     ` Peng Liang
2020-09-18  9:25       ` Peng Liang
2020-09-17 12:00 ` [RFC v2 3/7] kvm: arm64: save ID registers to sys_regs file Peng Liang
2020-09-17 12:00   ` Peng Liang
2020-09-18  7:34   ` Andrew Jones
2020-09-18  7:34     ` Andrew Jones
2020-09-17 12:00 ` [RFC v2 4/7] kvm: arm64: introduce check_user Peng Liang
2020-09-17 12:00   ` Peng Liang
2020-09-18  7:41   ` Andrew Jones
2020-09-18  7:41     ` Andrew Jones
2020-09-18  9:25     ` Peng Liang
2020-09-18  9:25       ` Peng Liang
2020-09-17 12:00 ` [RFC v2 5/7] kvm: arm64: implement check_user for ID registers Peng Liang
2020-09-17 12:00   ` Peng Liang
2020-09-18  7:46   ` Andrew Jones
2020-09-18  7:46     ` Andrew Jones
2020-09-18  9:26     ` Peng Liang
2020-09-18  9:26       ` Peng Liang
2020-09-17 12:01 ` [RFC v2 6/7] kvm: arm64: make ID registers configurable Peng Liang
2020-09-17 12:01   ` Peng Liang
2020-09-18  7:50   ` Andrew Jones
2020-09-18  7:50     ` Andrew Jones
2020-09-18  9:26     ` Peng Liang
2020-09-18  9:26       ` Peng Liang
2020-09-17 12:01 ` [RFC v2 7/7] kvm: arm64: add KVM_CAP_ARM_CPU_FEATURE extension Peng Liang
2020-09-17 12:01   ` Peng Liang
2020-09-18  7:55   ` Andrew Jones
2020-09-18  7:55     ` Andrew Jones
2020-09-18  9:26     ` Peng Liang
2020-09-18  9:26       ` Peng Liang
2020-09-18  8:01 ` [RFC v2 0/7] kvm: arm64: emulate ID registers Andrew Jones
2020-09-18  8:01   ` Andrew Jones
2020-09-18  9:51   ` Peng Liang
2020-09-18  9:51     ` Peng Liang
2020-09-18 10:20     ` Andrew Jones
2020-09-18 10:20       ` Andrew Jones

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