From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Fabio Estevam <festevam@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>,
Jim Quinlan <james.quinlan@broadcom.com>,
Stephen Rothwell <sfr@canb.auug.org.au>,
abhimanyu.saini@nxp.com, Ioana Ciornei <ioana.ciornei@nxp.com>,
Naresh Kamboju <naresh.kamboju@linaro.org>,
Joerg Roedel <joro@8bytes.org>,
Robin Murphy <robin.murphy@arm.com>,
Poonam Aggrwal <poonam.aggrwal@nxp.com>,
Rob Herring <robh@kernel.org>, Joerg Roedel <jroedel@suse.de>,
Arnd Bergmann <arnd@arndb.de>,
Richard Weinberger <richard@nod.at>,
open list <linux-kernel@vger.kernel.org>,
lkft-triage@lists.linaro.org,
Linux-Next Mailing List <linux-next@vger.kernel.org>,
linux-mtd@lists.infradead.org, Suram Suram <suram@nxp.com>,
masonccyang@mxic.com.tw, Will Deacon <will@kernel.org>,
"Z.Q. Hou" <Zhiqiang.Hou@nxp.com>, Christoph Hellwig <hch@lst.de>
Subject: Re: arm-smmu 5000000.iommu: Cannot accommodate DMA offset for IOMMU page tables
Date: Wed, 14 Oct 2020 14:58:46 +0200 [thread overview]
Message-ID: <20201014145846.613977d5@xps13> (raw)
In-Reply-To: <CAOMZO5DxVQ1va4aviTkgC0O6+KmpkYvYDVPh7v2Ajqggq7aoow@mail.gmail.com>
Hello,
Fabio Estevam <festevam@gmail.com> wrote on Wed, 14 Oct 2020 09:28:49
-0300:
> Hi Florian,
>
> On Sun, Oct 11, 2020 at 6:59 PM Florian Fainelli <f.fainelli@gmail.com> wrote:
>
> > however the NAND warning still remains. Someone else familiar with these
> > NXP development boards should fix the DTS so as to provide the require
> > ECC strength property.
>
> The ECC NAND warning looks like a regression.
>
> I had originally reported it for an imx27 board and now I also pointed
> out that it also affects Layerscape:
> https://lore.kernel.org/linux-mtd/20201013193652.0c535c7c@xps13/T/#m09fad7eacdf86aee0834bbd8863d6d5ee2e69f8c
I think this thread initially reported two distinct defects, one has
been solved, the second one is in my hands but I couldn't find the root
cause yet. I tried to reproduce, without luck, with another NAND
controller. If someone has an imx based board and a NAND controller on
it, I would appreciate some help.
Thanks,
Miquèl
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Fabio Estevam <festevam@gmail.com>
Cc: lkft-triage@lists.linaro.org, linux-mtd@lists.infradead.org,
Ioana Ciornei <ioana.ciornei@nxp.com>,
Will Deacon <will@kernel.org>, Christoph Hellwig <hch@lst.de>,
abhimanyu.saini@nxp.com, Stephen Rothwell <sfr@canb.auug.org.au>,
Florian Fainelli <f.fainelli@gmail.com>,
Richard Weinberger <richard@nod.at>,
Naresh Kamboju <naresh.kamboju@linaro.org>,
Linux-Next Mailing List <linux-next@vger.kernel.org>,
masonccyang@mxic.com.tw, Poonam Aggrwal <poonam.aggrwal@nxp.com>,
Joerg Roedel <jroedel@suse.de>, Arnd Bergmann <arnd@arndb.de>,
Rob Herring <robh@kernel.org>, "Z.Q. Hou" <Zhiqiang.Hou@nxp.com>,
open list <linux-kernel@vger.kernel.org>,
Jim Quinlan <james.quinlan@broadcom.com>,
Suram Suram <suram@nxp.com>, Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>
Subject: Re: arm-smmu 5000000.iommu: Cannot accommodate DMA offset for IOMMU page tables
Date: Wed, 14 Oct 2020 14:58:46 +0200 [thread overview]
Message-ID: <20201014145846.613977d5@xps13> (raw)
In-Reply-To: <CAOMZO5DxVQ1va4aviTkgC0O6+KmpkYvYDVPh7v2Ajqggq7aoow@mail.gmail.com>
Hello,
Fabio Estevam <festevam@gmail.com> wrote on Wed, 14 Oct 2020 09:28:49
-0300:
> Hi Florian,
>
> On Sun, Oct 11, 2020 at 6:59 PM Florian Fainelli <f.fainelli@gmail.com> wrote:
>
> > however the NAND warning still remains. Someone else familiar with these
> > NXP development boards should fix the DTS so as to provide the require
> > ECC strength property.
>
> The ECC NAND warning looks like a regression.
>
> I had originally reported it for an imx27 board and now I also pointed
> out that it also affects Layerscape:
> https://lore.kernel.org/linux-mtd/20201013193652.0c535c7c@xps13/T/#m09fad7eacdf86aee0834bbd8863d6d5ee2e69f8c
I think this thread initially reported two distinct defects, one has
been solved, the second one is in my hands but I couldn't find the root
cause yet. I tried to reproduce, without luck, with another NAND
controller. If someone has an imx based board and a NAND controller on
it, I would appreciate some help.
Thanks,
Miquèl
______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/
next prev parent reply other threads:[~2020-10-14 13:25 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-21 13:20 arm-smmu 5000000.iommu: Cannot accommodate DMA offset for IOMMU page tables Naresh Kamboju
2020-09-21 13:20 ` Naresh Kamboju
2020-09-21 13:20 ` Naresh Kamboju
2020-09-21 14:51 ` Robin Murphy
2020-09-21 14:51 ` Robin Murphy
2020-09-21 14:51 ` Robin Murphy
2020-09-24 9:03 ` Joerg Roedel
2020-09-24 9:03 ` Joerg Roedel
2020-09-24 9:03 ` Joerg Roedel
2020-09-24 9:08 ` Robin Murphy
2020-09-24 9:08 ` Robin Murphy
2020-09-24 9:08 ` Robin Murphy
2020-09-24 9:25 ` Joerg Roedel
2020-09-24 9:25 ` Joerg Roedel
2020-09-24 9:25 ` Joerg Roedel
2020-09-24 9:36 ` Robin Murphy
2020-09-24 9:36 ` Robin Murphy
2020-09-24 9:36 ` Robin Murphy
2020-09-24 9:56 ` Joerg Roedel
2020-09-24 9:56 ` Joerg Roedel
2020-09-24 9:56 ` Joerg Roedel
2020-10-09 13:54 ` Naresh Kamboju
2020-10-09 13:54 ` Naresh Kamboju
2020-10-09 13:54 ` Naresh Kamboju
2020-10-09 13:56 ` Naresh Kamboju
2020-10-09 13:56 ` Naresh Kamboju
2020-10-09 13:56 ` Naresh Kamboju
2020-10-10 18:53 ` Stephen Rothwell
2020-10-10 18:53 ` Stephen Rothwell
2020-10-11 20:36 ` Jim Quinlan
2020-10-11 20:36 ` Jim Quinlan
2020-10-11 21:59 ` Florian Fainelli
2020-10-11 21:59 ` Florian Fainelli
2020-10-14 12:28 ` Fabio Estevam
2020-10-14 12:28 ` Fabio Estevam
2020-10-14 12:58 ` Miquel Raynal [this message]
2020-10-14 12:58 ` Miquel Raynal
2020-10-15 7:48 ` Christoph Hellwig
2020-10-15 7:48 ` Christoph Hellwig
2020-10-15 18:17 ` Florian Fainelli
2020-10-15 18:17 ` Florian Fainelli
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