* [Intel-gfx] [PATCH 1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating()
@ 2020-07-16 19:04 Ville Syrjala
2020-07-16 19:04 ` [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl Ville Syrjala
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Ville Syrjala @ 2020-07-16 19:04 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
It's silly to have if(SKL) checks in gen9_init_clock_gating() when
we can just move those bits into skl_init_clock_gating().
I'm not entirely convinced we even need this w/a, or if we do
then maybe we want it for kbl/cfl as well. IIRC it was only
listed in the wadb, but that is now dead so can't double check
anymore. Bspec doesn't seem to have any purely skl specific
DOP clock gating workarounds listed.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
Probably should move this to the gt w/a code actually. But
there's a lot more gt related stuff still in .init_clock_gating()
so should grab a bigger shovel to move it all in one go.
drivers/gpu/drm/i915/intel_pm.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index cfabbe0481ab..0a1a95060f38 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -100,12 +100,6 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
*/
I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
DISP_FBC_MEMORY_WAKE);
-
- if (IS_SKYLAKE(dev_priv)) {
- /* WaDisableDopClockGating */
- I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL)
- & ~GEN7_DOP_CLOCK_GATE_ENABLE);
- }
}
static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
@@ -7251,6 +7245,10 @@ static void skl_init_clock_gating(struct drm_i915_private *dev_priv)
{
gen9_init_clock_gating(dev_priv);
+ /* WaDisableDopClockGating:skl */
+ I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL) &
+ ~GEN7_DOP_CLOCK_GATE_ENABLE);
+
/* WAC6entrylatency:skl */
I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
FBC_LLC_FULLY_OPEN);
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl
2020-07-16 19:04 [Intel-gfx] [PATCH 1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating() Ville Syrjala
@ 2020-07-16 19:04 ` Ville Syrjala
2020-10-15 12:58 ` Ville Syrjälä
2020-10-15 20:19 ` Chris Wilson
2020-07-16 19:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating() Patchwork
` (2 subsequent siblings)
3 siblings, 2 replies; 7+ messages in thread
From: Ville Syrjala @ 2020-07-16 19:04 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
WAC6entrylatency is trying to fix excessive rc6 entry latency caused
by the extra delay from FBC_LLC_READ_CTRL, which is there for some
extra sync with uncore for frame buffer caching in LLC.
Reading through the hsd the recommendation was to set the FBC_LLC_FULLY_OPEN
bit to disable this extra delay entirely. This can be done whenever fb LLC
caching is not used. The alternative suggestion was to reduce the delay to
eg. 0x5 via updated BIOS programming instructions. But all the kbl/cfl
machines I've seen still have the default 0xff programmed. As we never use
fb LLC caching let's just apply the w/a to all skl derivatives to get
consistent rc6 latencies.
I was able to measure the effect of FBC_LLC_READ_CTRL to rc6 latency
via forcewake. Here's a graph of some of the results:
sleep;fw_req=1;wait fw_ack==1;sleep;fw_req=0;wait fw_ack==0
fw_ack==1 duration
160us +----------------------------------------------------------------+
| + + $$+ + + |
| $$ $ $ ******$$ ** $ $**$* #########$$######|
140us |-$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$*$$$$$$$$$$$$$$$$ $$$$$$|
| $ * # |
| $ * # |
120us |$+ * # +-|
|$ * # |
|$ * # # |
100us |$+ ************######################## +-|
|$ * *# |
|$ ***** ######### |
80us |$+ * # #### ## +-|
|$ **** ### # # |
| ** #### FBC_LLC_READ_CTRL: 0x8000 ******* |
60us |-###### FBC_LLC_READ_CTRL: 0xffff #######-|
|## + + FBC_LLC_READ_CTRL: 0x400000ff $$$$$$$ |
+----------------------------------------------------------------+
0ms 10ms 20ms 30ms 40ms 50ms 60ms
sleep duration
The default FBC_LLC_READ_CTRL value of 0xff is documented to give us
a 170usec delay. That tracks well with the knees at 0xffff->~44usec and
0x8000->~22usec we see in the graph.
We can see that if we sleep longer than the FBC_LLC_READ_CTRL delay
we always observe the full (~145usec) rc6 wakeup latency. But if we sleep
for less than the FBC_LLC_READ_CTRL delay we see a quicker fw wakeup,
presumably due the hardware not having yet entered rc6 fully.
The other plateaus in the graph I suspect correspond to some shallower
internal rc states.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 0a1a95060f38..3998aa00563e 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -7197,6 +7197,10 @@ static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
cnp_init_clock_gating(dev_priv);
gen9_init_clock_gating(dev_priv);
+ /* WAC6entrylatency:cfl */
+ I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
+ FBC_LLC_FULLY_OPEN);
+
/*
* WaFbcTurnOffFbcWatermark:cfl
* Display WA #0562: cfl
@@ -7216,6 +7220,10 @@ static void kbl_init_clock_gating(struct drm_i915_private *dev_priv)
{
gen9_init_clock_gating(dev_priv);
+ /* WAC6entrylatency:kbl */
+ I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
+ FBC_LLC_FULLY_OPEN);
+
/* WaDisableSDEUnitClockGating:kbl */
if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating()
2020-07-16 19:04 [Intel-gfx] [PATCH 1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating() Ville Syrjala
2020-07-16 19:04 ` [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl Ville Syrjala
@ 2020-07-16 19:37 ` Patchwork
2020-07-16 23:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-07-16 23:50 ` [Intel-gfx] [PATCH 1/2] " Souza, Jose
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2020-07-16 19:37 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 7046 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating()
URL : https://patchwork.freedesktop.org/series/79563/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8757 -> Patchwork_18194
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/index.html
Known issues
------------
Here are the changes found in Patchwork_18194 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3:
- fi-tgl-u2: [PASS][1] -> [FAIL][2] ([i915#1888])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-tgl-u2/igt@gem_exec_suspend@basic-s3.html
* igt@gem_flink_basic@flink-lifetime:
- fi-tgl-y: [PASS][3] -> [DMESG-WARN][4] ([i915#402]) +2 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-y/igt@gem_flink_basic@flink-lifetime.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-tgl-y/igt@gem_flink_basic@flink-lifetime.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0:
- fi-tgl-u2: [FAIL][7] ([i915#1888]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-tgl-u2/igt@gem_exec_suspend@basic-s0.html
* igt@i915_module_load@reload:
- fi-tgl-u2: [DMESG-WARN][9] ([i915#402]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-u2/igt@i915_module_load@reload.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-tgl-u2/igt@i915_module_load@reload.html
- fi-icl-y: [DMESG-WARN][11] ([i915#1982]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-icl-y/igt@i915_module_load@reload.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-icl-y/igt@i915_module_load@reload.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- fi-bsw-kefka: [DMESG-WARN][13] ([i915#1982]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-bsw-kefka/igt@i915_pm_rpm@basic-pci-d3-state.html
* igt@i915_pm_rpm@module-reload:
- fi-cml-s: [DMESG-WARN][15] ([i915#1982]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-cml-s/igt@i915_pm_rpm@module-reload.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-cml-s/igt@i915_pm_rpm@module-reload.html
* igt@kms_busy@basic@flip:
- fi-tgl-y: [DMESG-WARN][17] ([i915#1982]) -> [PASS][18] +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-y/igt@kms_busy@basic@flip.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-tgl-y/igt@kms_busy@basic@flip.html
* igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1:
- fi-icl-u2: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-icl-u2/igt@kms_flip@basic-flip-vs-wf_vblank@b-edp1.html
* igt@prime_self_import@basic-with_two_bos:
- fi-tgl-y: [DMESG-WARN][21] ([i915#402]) -> [PASS][22] +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-tgl-y/igt@prime_self_import@basic-with_two_bos.html
#### Warnings ####
* igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1:
- fi-kbl-x1275: [DMESG-WARN][23] ([i915#62] / [i915#92]) -> [DMESG-WARN][24] ([i915#62] / [i915#92] / [i915#95]) +3 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-kbl-x1275/igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
- fi-kbl-x1275: [DMESG-WARN][25] ([i915#1982] / [i915#62] / [i915#92]) -> [DMESG-WARN][26] ([i915#62] / [i915#92])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-kbl-x1275/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
* igt@prime_vgem@basic-fence-flip:
- fi-kbl-x1275: [DMESG-WARN][27] ([i915#62] / [i915#92] / [i915#95]) -> [DMESG-WARN][28] ([i915#62] / [i915#92])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/fi-kbl-x1275/igt@prime_vgem@basic-fence-flip.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/fi-kbl-x1275/igt@prime_vgem@basic-fence-flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
[i915#92]: https://gitlab.freedesktop.org/drm/intel/issues/92
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (45 -> 40)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-byt-clapper
Build changes
-------------
* Linux: CI_DRM_8757 -> Patchwork_18194
CI-20190529: 20190529
CI_DRM_8757: 6802049b80a49f5f45c2bc2dd3e6d189204dc2bb @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5738: bc8b56fe177af34fbde7b96f1f66614a0014c6ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18194: 82d36900bdea769bf657b7ad3cdf790f47bbfa68 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
82d36900bdea drm/i915: Apply WAC6entrylatency to kbl/cfl
f0ee1df116c4 drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating()
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/index.html
[-- Attachment #1.2: Type: text/html, Size: 9315 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating()
2020-07-16 19:04 [Intel-gfx] [PATCH 1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating() Ville Syrjala
2020-07-16 19:04 ` [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl Ville Syrjala
2020-07-16 19:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating() Patchwork
@ 2020-07-16 23:27 ` Patchwork
2020-07-16 23:50 ` [Intel-gfx] [PATCH 1/2] " Souza, Jose
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2020-07-16 23:27 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 16312 bytes --]
== Series Details ==
Series: series starting with [1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating()
URL : https://patchwork.freedesktop.org/series/79563/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_8757_full -> Patchwork_18194_full
====================================================
Summary
-------
**WARNING**
Minor unknown changes coming with Patchwork_18194_full need to be verified
manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18194_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_18194_full:
### IGT changes ###
#### Warnings ####
* igt@kms_content_protection@atomic:
- shard-kbl: [TIMEOUT][1] ([i915#1319] / [i915#1958] / [i915#2119]) -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl6/igt@kms_content_protection@atomic.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-kbl7/igt@kms_content_protection@atomic.html
Known issues
------------
Here are the changes found in Patchwork_18194_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_busy@close-race:
- shard-skl: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +14 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl2/igt@gem_busy@close-race.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl2/igt@gem_busy@close-race.html
* igt@gem_exec_whisper@basic-contexts-forked-all:
- shard-glk: [PASS][5] -> [DMESG-WARN][6] ([i915#118] / [i915#95]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-glk9/igt@gem_exec_whisper@basic-contexts-forked-all.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-glk7/igt@gem_exec_whisper@basic-contexts-forked-all.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][7] -> [FAIL][8] ([i915#454])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-iclb6/igt@i915_pm_dc@dc6-psr.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-iclb2/igt@i915_pm_dc@dc6-psr.html
* igt@i915_pm_rpm@cursor-dpms:
- shard-kbl: [PASS][9] -> [DMESG-WARN][10] ([i915#165])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl6/igt@i915_pm_rpm@cursor-dpms.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-kbl2/igt@i915_pm_rpm@cursor-dpms.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-180:
- shard-glk: [PASS][11] -> [DMESG-FAIL][12] ([i915#118] / [i915#95])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-glk5/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-glk8/igt@kms_big_fb@x-tiled-64bpp-rotate-180.html
* igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][13] -> [DMESG-WARN][14] ([i915#1982]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-glk8/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@ab-hdmi-a1-hdmi-a2.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-glk1/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +14 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl7/igt@kms_flip@flip-vs-suspend@c-dp1.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-kbl2/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite:
- shard-tglb: [PASS][17] -> [DMESG-WARN][18] ([i915#1982]) +2 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-tglb6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-tglb2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][19] -> [FAIL][20] ([i915#1188])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl8/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [PASS][21] -> [FAIL][22] ([fdo#108145] / [i915#265]) +1 similar issue
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl3/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr2_su@frontbuffer:
- shard-iclb: [PASS][23] -> [SKIP][24] ([fdo#109642] / [fdo#111068])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-iclb2/igt@kms_psr2_su@frontbuffer.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-iclb6/igt@kms_psr2_su@frontbuffer.html
* igt@kms_psr@psr2_cursor_mmap_cpu:
- shard-iclb: [PASS][25] -> [SKIP][26] ([fdo#109441]) +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_cpu.html
* igt@kms_vblank@pipe-c-wait-busy:
- shard-kbl: [PASS][27] -> [DMESG-WARN][28] ([i915#1982])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl2/igt@kms_vblank@pipe-c-wait-busy.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-kbl3/igt@kms_vblank@pipe-c-wait-busy.html
* igt@perf@polling-small-buf:
- shard-skl: [PASS][29] -> [FAIL][30] ([i915#1722])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl5/igt@perf@polling-small-buf.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl5/igt@perf@polling-small-buf.html
* igt@perf_pmu@semaphore-busy@rcs0:
- shard-kbl: [PASS][31] -> [FAIL][32] ([i915#1820])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl7/igt@perf_pmu@semaphore-busy@rcs0.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-kbl4/igt@perf_pmu@semaphore-busy@rcs0.html
#### Possible fixes ####
* igt@gem_ctx_persistence@processes:
- shard-skl: [FAIL][33] ([i915#1528]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl1/igt@gem_ctx_persistence@processes.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl8/igt@gem_ctx_persistence@processes.html
* igt@gem_exec_reloc@basic-concurrent0:
- shard-glk: [FAIL][35] ([i915#1930]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-glk8/igt@gem_exec_reloc@basic-concurrent0.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-glk1/igt@gem_exec_reloc@basic-concurrent0.html
* igt@gem_exec_whisper@basic-queues-all:
- shard-glk: [DMESG-WARN][37] ([i915#118] / [i915#95]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-glk3/igt@gem_exec_whisper@basic-queues-all.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-glk5/igt@gem_exec_whisper@basic-queues-all.html
* igt@gem_userptr_blits@invalid-mmap-offset-unsync@gtt:
- shard-tglb: [INCOMPLETE][39] ([i915#2119] / [i915#2149]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-tglb7/igt@gem_userptr_blits@invalid-mmap-offset-unsync@gtt.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-tglb6/igt@gem_userptr_blits@invalid-mmap-offset-unsync@gtt.html
* igt@gem_workarounds@suspend-resume-fd:
- shard-skl: [INCOMPLETE][41] -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl10/igt@gem_workarounds@suspend-resume-fd.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl6/igt@gem_workarounds@suspend-resume-fd.html
* igt@i915_module_load@reload:
- shard-tglb: [DMESG-WARN][43] ([i915#402]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-tglb6/igt@i915_module_load@reload.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-tglb3/igt@i915_module_load@reload.html
* igt@kms_color@pipe-c-ctm-0-25:
- shard-skl: [DMESG-WARN][45] ([i915#1982]) -> [PASS][46] +6 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl1/igt@kms_color@pipe-c-ctm-0-25.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl5/igt@kms_color@pipe-c-ctm-0-25.html
* igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen:
- shard-skl: [FAIL][47] ([i915#54]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl1/igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl5/igt@kms_cursor_crc@pipe-b-cursor-64x64-onscreen.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-skl: [FAIL][49] ([i915#79]) -> [PASS][50] +1 similar issue
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl8/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-edp1:
- shard-skl: [INCOMPLETE][51] ([i915#198]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl9/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl10/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [DMESG-WARN][53] ([i915#180]) -> [PASS][54] +7 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [FAIL][55] ([i915#1188]) -> [PASS][56]
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-skl3/igt@kms_hdr@bpc-switch.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-skl8/igt@kms_hdr@bpc-switch.html
* igt@kms_psr2_su@page_flip:
- shard-iclb: [SKIP][57] ([fdo#109642] / [fdo#111068]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-iclb6/igt@kms_psr2_su@page_flip.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-iclb2/igt@kms_psr2_su@page_flip.html
* igt@kms_psr@psr2_sprite_mmap_gtt:
- shard-iclb: [SKIP][59] ([fdo#109441]) -> [PASS][60] +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-iclb6/igt@kms_psr@psr2_sprite_mmap_gtt.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
* igt@kms_vblank@pipe-c-wait-busy-hang:
- shard-apl: [DMESG-WARN][61] ([i915#1635] / [i915#1982]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl1/igt@kms_vblank@pipe-c-wait-busy-hang.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-apl1/igt@kms_vblank@pipe-c-wait-busy-hang.html
#### Warnings ####
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [SKIP][63] ([fdo#109349]) -> [DMESG-WARN][64] ([i915#1226])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-iclb1/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-apl: [DMESG-FAIL][65] ([fdo#108145] / [i915#1635] / [i915#1982]) -> [FAIL][66] ([fdo#108145] / [i915#1635] / [i915#265])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-apl8/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
* igt@runner@aborted:
- shard-apl: ([FAIL][67], [FAIL][68], [FAIL][69], [FAIL][70]) ([i915#1610] / [i915#1635] / [i915#2110]) -> [FAIL][71] ([i915#1635] / [i915#2110])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl1/igt@runner@aborted.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl7/igt@runner@aborted.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl8/igt@runner@aborted.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_8757/shard-apl3/igt@runner@aborted.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/shard-apl2/igt@runner@aborted.html
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#1528]: https://gitlab.freedesktop.org/drm/intel/issues/1528
[i915#1610]: https://gitlab.freedesktop.org/drm/intel/issues/1610
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#165]: https://gitlab.freedesktop.org/drm/intel/issues/165
[i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1820]: https://gitlab.freedesktop.org/drm/intel/issues/1820
[i915#1930]: https://gitlab.freedesktop.org/drm/intel/issues/1930
[i915#1958]: https://gitlab.freedesktop.org/drm/intel/issues/1958
[i915#198]: https://gitlab.freedesktop.org/drm/intel/issues/198
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2110]: https://gitlab.freedesktop.org/drm/intel/issues/2110
[i915#2119]: https://gitlab.freedesktop.org/drm/intel/issues/2119
[i915#2149]: https://gitlab.freedesktop.org/drm/intel/issues/2149
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_8757 -> Patchwork_18194
CI-20190529: 20190529
CI_DRM_8757: 6802049b80a49f5f45c2bc2dd3e6d189204dc2bb @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5738: bc8b56fe177af34fbde7b96f1f66614a0014c6ef @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18194: 82d36900bdea769bf657b7ad3cdf790f47bbfa68 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18194/index.html
[-- Attachment #1.2: Type: text/html, Size: 19327 bytes --]
[-- Attachment #2: Type: text/plain, Size: 160 bytes --]
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating()
2020-07-16 19:04 [Intel-gfx] [PATCH 1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating() Ville Syrjala
` (2 preceding siblings ...)
2020-07-16 23:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2020-07-16 23:50 ` Souza, Jose
3 siblings, 0 replies; 7+ messages in thread
From: Souza, Jose @ 2020-07-16 23:50 UTC (permalink / raw)
To: ville.syrjala@linux.intel.com, intel-gfx@lists.freedesktop.org
On Thu, 2020-07-16 at 22:04 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> It's silly to have if(SKL) checks in gen9_init_clock_gating() when
> we can just move those bits into skl_init_clock_gating().
>
> I'm not entirely convinced we even need this w/a, or if we do
> then maybe we want it for kbl/cfl as well. IIRC it was only
> listed in the wadb, but that is now dead so can't double check
> anymore. Bspec doesn't seem to have any purely skl specific
> DOP clock gating workarounds listed.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> Probably should move this to the gt w/a code actually. But
> there's a lot more gt related stuff still in .init_clock_gating()
> so should grab a bigger shovel to move it all in one go.
>
> drivers/gpu/drm/i915/intel_pm.c | 10 ++++------
> 1 file changed, 4 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index cfabbe0481ab..0a1a95060f38 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -100,12 +100,6 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
> */
> I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
> DISP_FBC_MEMORY_WAKE);
> -
> - if (IS_SKYLAKE(dev_priv)) {
> - /* WaDisableDopClockGating */
> - I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL)
> - & ~GEN7_DOP_CLOCK_GATE_ENABLE);
> - }
> }
>
> static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
> @@ -7251,6 +7245,10 @@ static void skl_init_clock_gating(struct drm_i915_private *dev_priv)
> {
> gen9_init_clock_gating(dev_priv);
>
> + /* WaDisableDopClockGating:skl */
> + I915_WRITE(GEN7_MISCCPCTL, I915_READ(GEN7_MISCCPCTL) &
> + ~GEN7_DOP_CLOCK_GATE_ENABLE);
> +
> /* WAC6entrylatency:skl */
> I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
> FBC_LLC_FULLY_OPEN);
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl
2020-07-16 19:04 ` [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl Ville Syrjala
@ 2020-10-15 12:58 ` Ville Syrjälä
2020-10-15 20:19 ` Chris Wilson
1 sibling, 0 replies; 7+ messages in thread
From: Ville Syrjälä @ 2020-10-15 12:58 UTC (permalink / raw)
To: intel-gfx
On Thu, Jul 16, 2020 at 10:04:26PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> WAC6entrylatency is trying to fix excessive rc6 entry latency caused
> by the extra delay from FBC_LLC_READ_CTRL, which is there for some
> extra sync with uncore for frame buffer caching in LLC.
>
> Reading through the hsd the recommendation was to set the FBC_LLC_FULLY_OPEN
> bit to disable this extra delay entirely. This can be done whenever fb LLC
> caching is not used. The alternative suggestion was to reduce the delay to
> eg. 0x5 via updated BIOS programming instructions. But all the kbl/cfl
> machines I've seen still have the default 0xff programmed. As we never use
> fb LLC caching let's just apply the w/a to all skl derivatives to get
> consistent rc6 latencies.
>
> I was able to measure the effect of FBC_LLC_READ_CTRL to rc6 latency
> via forcewake. Here's a graph of some of the results:
>
> sleep;fw_req=1;wait fw_ack==1;sleep;fw_req=0;wait fw_ack==0
> fw_ack==1 duration
> 160us +----------------------------------------------------------------+
> | + + $$+ + + |
> | $$ $ $ ******$$ ** $ $**$* #########$$######|
> 140us |-$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$*$$$$$$$$$$$$$$$$ $$$$$$|
> | $ * # |
> | $ * # |
> 120us |$+ * # +-|
> |$ * # |
> |$ * # # |
> 100us |$+ ************######################## +-|
> |$ * *# |
> |$ ***** ######### |
> 80us |$+ * # #### ## +-|
> |$ **** ### # # |
> | ** #### FBC_LLC_READ_CTRL: 0x8000 ******* |
> 60us |-###### FBC_LLC_READ_CTRL: 0xffff #######-|
> |## + + FBC_LLC_READ_CTRL: 0x400000ff $$$$$$$ |
> +----------------------------------------------------------------+
> 0ms 10ms 20ms 30ms 40ms 50ms 60ms
> sleep duration
>
> The default FBC_LLC_READ_CTRL value of 0xff is documented to give us
> a 170usec delay. That tracks well with the knees at 0xffff->~44usec and
> 0x8000->~22usec we see in the graph.
Those should obviously say msec instead of usec.
>
> We can see that if we sleep longer than the FBC_LLC_READ_CTRL delay
> we always observe the full (~145usec) rc6 wakeup latency. But if we sleep
> for less than the FBC_LLC_READ_CTRL delay we see a quicker fw wakeup,
> presumably due the hardware not having yet entered rc6 fully.
> The other plateaus in the graph I suspect correspond to some shallower
> internal rc states.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 0a1a95060f38..3998aa00563e 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -7197,6 +7197,10 @@ static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
> cnp_init_clock_gating(dev_priv);
> gen9_init_clock_gating(dev_priv);
>
> + /* WAC6entrylatency:cfl */
> + I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
> + FBC_LLC_FULLY_OPEN);
> +
> /*
> * WaFbcTurnOffFbcWatermark:cfl
> * Display WA #0562: cfl
> @@ -7216,6 +7220,10 @@ static void kbl_init_clock_gating(struct drm_i915_private *dev_priv)
> {
> gen9_init_clock_gating(dev_priv);
>
> + /* WAC6entrylatency:kbl */
> + I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
> + FBC_LLC_FULLY_OPEN);
> +
> /* WaDisableSDEUnitClockGating:kbl */
> if (IS_KBL_REVID(dev_priv, 0, KBL_REVID_B0))
> I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
> --
> 2.26.2
--
Ville Syrjälä
Intel
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^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl
2020-07-16 19:04 ` [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl Ville Syrjala
2020-10-15 12:58 ` Ville Syrjälä
@ 2020-10-15 20:19 ` Chris Wilson
1 sibling, 0 replies; 7+ messages in thread
From: Chris Wilson @ 2020-10-15 20:19 UTC (permalink / raw)
To: Ville Syrjala, intel-gfx
Quoting Ville Syrjala (2020-07-16 20:04:26)
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> WAC6entrylatency is trying to fix excessive rc6 entry latency caused
> by the extra delay from FBC_LLC_READ_CTRL, which is there for some
> extra sync with uncore for frame buffer caching in LLC.
>
> Reading through the hsd the recommendation was to set the FBC_LLC_FULLY_OPEN
> bit to disable this extra delay entirely. This can be done whenever fb LLC
> caching is not used.
Ah, is that what it means by 'must not be set unless coordinated with
uncore?' Ok.
> The alternative suggestion was to reduce the delay to
> eg. 0x5 via updated BIOS programming instructions. But all the kbl/cfl
> machines I've seen still have the default 0xff programmed. As we never use
> fb LLC caching let's just apply the w/a to all skl derivatives to get
> consistent rc6 latencies.
>
> I was able to measure the effect of FBC_LLC_READ_CTRL to rc6 latency
> via forcewake. Here's a graph of some of the results:
>
> sleep;fw_req=1;wait fw_ack==1;sleep;fw_req=0;wait fw_ack==0
> fw_ack==1 duration
> 160us +----------------------------------------------------------------+
> | + + $$+ + + |
> | $$ $ $ ******$$ ** $ $**$* #########$$######|
> 140us |-$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$$*$$$$$$$$$$$$$$$$ $$$$$$|
> | $ * # |
> | $ * # |
> 120us |$+ * # +-|
> |$ * # |
> |$ * # # |
> 100us |$+ ************######################## +-|
> |$ * *# |
> |$ ***** ######### |
> 80us |$+ * # #### ## +-|
> |$ **** ### # # |
> | ** #### FBC_LLC_READ_CTRL: 0x8000 ******* |
> 60us |-###### FBC_LLC_READ_CTRL: 0xffff #######-|
> |## + + FBC_LLC_READ_CTRL: 0x400000ff $$$$$$$ |
> +----------------------------------------------------------------+
> 0ms 10ms 20ms 30ms 40ms 50ms 60ms
> sleep duration
>
> The default FBC_LLC_READ_CTRL value of 0xff is documented to give us
> a 170usec delay. That tracks well with the knees at 0xffff->~44usec and
> 0x8000->~22usec we see in the graph.
>
> We can see that if we sleep longer than the FBC_LLC_READ_CTRL delay
> we always observe the full (~145usec) rc6 wakeup latency. But if we sleep
> for less than the FBC_LLC_READ_CTRL delay we see a quicker fw wakeup,
> presumably due the hardware not having yet entered rc6 fully.
> The other plateaus in the graph I suspect correspond to some shallower
> internal rc states.
Hmm, so by setting LLC as fully open, there is always a fixed 140us
latency for rc6, implying that we always immediately try to enter rc6
rather than after ~50ms.
I realize that my rc6 power measurements should be with the display
already off and so will not show any effect. :|
The graph does imply that there should be a noticeable effect for
composited desktops, both in power saving and a latency penalty. 140us
is about the same sort of ballpark as all the over startup costs, and
one hopes they overlap.
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2020-10-15 20:19 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-07-16 19:04 [Intel-gfx] [PATCH 1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating() Ville Syrjala
2020-07-16 19:04 ` [Intel-gfx] [PATCH 2/2] drm/i915: Apply WAC6entrylatency to kbl/cfl Ville Syrjala
2020-10-15 12:58 ` Ville Syrjälä
2020-10-15 20:19 ` Chris Wilson
2020-07-16 19:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Move WaDisableDopClockGating:skl to skl_init_clock_gating() Patchwork
2020-07-16 23:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-07-16 23:50 ` [Intel-gfx] [PATCH 1/2] " Souza, Jose
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