All of lore.kernel.org
 help / color / mirror / Atom feed
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Lyude Paul <lyude@redhat.com>
Cc: David Airlie <airlied@linux.ie>,
	intel-gfx@lists.freedesktop.org,
	open list <linux-kernel@vger.kernel.org>,
	dri-devel@lists.freedesktop.org,
	Vasily Khoruzhick <anarsoul@gmail.com>,
	Sean Paul <seanpaul@chromium.org>,
	Wambui Karuga <wambui.karugax@gmail.com>
Subject: Re: [Intel-gfx] [RFC v2 1/8] drm/i915/dp: Program source OUI on eDP panels
Date: Thu, 15 Oct 2020 14:25:42 -0400	[thread overview]
Message-ID: <20201015182542.GB2616619@intel.com> (raw)
In-Reply-To: <20200916171855.129511-2-lyude@redhat.com>

On Wed, Sep 16, 2020 at 01:18:48PM -0400, Lyude Paul wrote:
> Since we're about to start adding support for Intel's magic HDR
> backlight interface over DPCD, we need to ensure we're properly
> programming this field so that Intel specific sink services are exposed.
> Otherwise, 0x300-0x3ff will just read zeroes.
> 
> We also take care not to reprogram the source OUI if it already matches
> what we expect. This is just to be careful so that we don't accidentally
> take the panel out of any backlight control modes we found it in.
> 
> v2:
> * Add careful parameter to intel_edp_init_source_oui() to avoid
>   re-writing the source OUI if it's already been set during driver
>   initialization
> 
> Signed-off-by: Lyude Paul <lyude@redhat.com>
> Cc: thaytan@noraisin.net
> Cc: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 33 +++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4bd10456ad188..7db2b6a3cd52e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3424,6 +3424,29 @@ void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
>  			    enable ? "enable" : "disable");
>  }
>  
> +static void
> +intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful)
> +{
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +	u8 oui[] = { 0x00, 0xaa, 0x01 };
> +	u8 buf[3] = { 0 };
> +
> +	/*
> +	 * During driver init, we want to be careful and avoid changing the source OUI if it's
> +	 * already set to what we want, so as to avoid clearing any state by accident
> +	 */
> +	if (careful) {

my first reaction here is why the problem described on the commit message doesn't
appear during the init, and setting it to the same shouldn't be a problem... but
yeap, I agree the risk of taking panel down is high... let's move with the careful approach


Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


> +		if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
> +			drm_err(&i915->drm, "Failed to read source OUI\n");
> +
> +		if (memcmp(oui, buf, sizeof(oui)) == 0)
> +			return;
> +	}
> +
> +	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)
> +		drm_err(&i915->drm, "Failed to write source OUI\n");
> +}
> +
>  /* If the sink supports it, try to set the power state appropriately */
>  void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
>  {
> @@ -3443,6 +3466,10 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
>  	} else {
>  		struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
>  
> +		/* Write the source OUI as early as possible */
> +		if (intel_dp_is_edp(intel_dp))
> +			intel_edp_init_source_oui(intel_dp, false);
> +
>  		/*
>  		 * When turning on, we need to retry for 1ms to give the sink
>  		 * time to wake up.
> @@ -4607,6 +4634,12 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
>  	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
>  		intel_dp_get_dsc_sink_cap(intel_dp);
>  
> +	/*
> +	 * If needed, program our source OUI so we can make various Intel-specific AUX services
> +	 * available (such as HDR backlight controls)
> +	 */
> +	intel_edp_init_source_oui(intel_dp, true);
> +
>  	return true;
>  }
>  
> -- 
> 2.26.2
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Lyude Paul <lyude@redhat.com>
Cc: thaytan@noraisin.net, "David Airlie" <airlied@linux.ie>,
	intel-gfx@lists.freedesktop.org,
	"open list" <linux-kernel@vger.kernel.org>,
	dri-devel@lists.freedesktop.org,
	"Gwan-gyeong Mun" <gwan-gyeong.mun@intel.com>,
	"Vasily Khoruzhick" <anarsoul@gmail.com>,
	"Uma Shankar" <uma.shankar@intel.com>,
	"Sean Paul" <seanpaul@chromium.org>,
	"José Roberto de Souza" <jose.souza@intel.com>,
	"Manasi Navare" <manasi.d.navare@intel.com>,
	"Wambui Karuga" <wambui.karugax@gmail.com>
Subject: Re: [RFC v2 1/8] drm/i915/dp: Program source OUI on eDP panels
Date: Thu, 15 Oct 2020 14:25:42 -0400	[thread overview]
Message-ID: <20201015182542.GB2616619@intel.com> (raw)
In-Reply-To: <20200916171855.129511-2-lyude@redhat.com>

On Wed, Sep 16, 2020 at 01:18:48PM -0400, Lyude Paul wrote:
> Since we're about to start adding support for Intel's magic HDR
> backlight interface over DPCD, we need to ensure we're properly
> programming this field so that Intel specific sink services are exposed.
> Otherwise, 0x300-0x3ff will just read zeroes.
> 
> We also take care not to reprogram the source OUI if it already matches
> what we expect. This is just to be careful so that we don't accidentally
> take the panel out of any backlight control modes we found it in.
> 
> v2:
> * Add careful parameter to intel_edp_init_source_oui() to avoid
>   re-writing the source OUI if it's already been set during driver
>   initialization
> 
> Signed-off-by: Lyude Paul <lyude@redhat.com>
> Cc: thaytan@noraisin.net
> Cc: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 33 +++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4bd10456ad188..7db2b6a3cd52e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3424,6 +3424,29 @@ void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
>  			    enable ? "enable" : "disable");
>  }
>  
> +static void
> +intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful)
> +{
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +	u8 oui[] = { 0x00, 0xaa, 0x01 };
> +	u8 buf[3] = { 0 };
> +
> +	/*
> +	 * During driver init, we want to be careful and avoid changing the source OUI if it's
> +	 * already set to what we want, so as to avoid clearing any state by accident
> +	 */
> +	if (careful) {

my first reaction here is why the problem described on the commit message doesn't
appear during the init, and setting it to the same shouldn't be a problem... but
yeap, I agree the risk of taking panel down is high... let's move with the careful approach


Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


> +		if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
> +			drm_err(&i915->drm, "Failed to read source OUI\n");
> +
> +		if (memcmp(oui, buf, sizeof(oui)) == 0)
> +			return;
> +	}
> +
> +	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)
> +		drm_err(&i915->drm, "Failed to write source OUI\n");
> +}
> +
>  /* If the sink supports it, try to set the power state appropriately */
>  void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
>  {
> @@ -3443,6 +3466,10 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
>  	} else {
>  		struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
>  
> +		/* Write the source OUI as early as possible */
> +		if (intel_dp_is_edp(intel_dp))
> +			intel_edp_init_source_oui(intel_dp, false);
> +
>  		/*
>  		 * When turning on, we need to retry for 1ms to give the sink
>  		 * time to wake up.
> @@ -4607,6 +4634,12 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
>  	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
>  		intel_dp_get_dsc_sink_cap(intel_dp);
>  
> +	/*
> +	 * If needed, program our source OUI so we can make various Intel-specific AUX services
> +	 * available (such as HDR backlight controls)
> +	 */
> +	intel_edp_init_source_oui(intel_dp, true);
> +
>  	return true;
>  }
>  
> -- 
> 2.26.2
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Lyude Paul <lyude@redhat.com>
Cc: intel-gfx@lists.freedesktop.org, thaytan@noraisin.net,
	"David Airlie" <airlied@linux.ie>,
	"open list" <linux-kernel@vger.kernel.org>,
	"Gwan-gyeong Mun" <gwan-gyeong.mun@intel.com>,
	"Vasily Khoruzhick" <anarsoul@gmail.com>,
	"Uma Shankar" <uma.shankar@intel.com>,
	"Sean Paul" <seanpaul@chromium.org>,
	dri-devel@lists.freedesktop.org,
	"José Roberto de Souza" <jose.souza@intel.com>,
	"Manasi Navare" <manasi.d.navare@intel.com>,
	"Wambui Karuga" <wambui.karugax@gmail.com>
Subject: Re: [RFC v2 1/8] drm/i915/dp: Program source OUI on eDP panels
Date: Thu, 15 Oct 2020 14:25:42 -0400	[thread overview]
Message-ID: <20201015182542.GB2616619@intel.com> (raw)
In-Reply-To: <20200916171855.129511-2-lyude@redhat.com>

On Wed, Sep 16, 2020 at 01:18:48PM -0400, Lyude Paul wrote:
> Since we're about to start adding support for Intel's magic HDR
> backlight interface over DPCD, we need to ensure we're properly
> programming this field so that Intel specific sink services are exposed.
> Otherwise, 0x300-0x3ff will just read zeroes.
> 
> We also take care not to reprogram the source OUI if it already matches
> what we expect. This is just to be careful so that we don't accidentally
> take the panel out of any backlight control modes we found it in.
> 
> v2:
> * Add careful parameter to intel_edp_init_source_oui() to avoid
>   re-writing the source OUI if it's already been set during driver
>   initialization
> 
> Signed-off-by: Lyude Paul <lyude@redhat.com>
> Cc: thaytan@noraisin.net
> Cc: Vasily Khoruzhick <anarsoul@gmail.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 33 +++++++++++++++++++++++++
>  1 file changed, 33 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4bd10456ad188..7db2b6a3cd52e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3424,6 +3424,29 @@ void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
>  			    enable ? "enable" : "disable");
>  }
>  
> +static void
> +intel_edp_init_source_oui(struct intel_dp *intel_dp, bool careful)
> +{
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +	u8 oui[] = { 0x00, 0xaa, 0x01 };
> +	u8 buf[3] = { 0 };
> +
> +	/*
> +	 * During driver init, we want to be careful and avoid changing the source OUI if it's
> +	 * already set to what we want, so as to avoid clearing any state by accident
> +	 */
> +	if (careful) {

my first reaction here is why the problem described on the commit message doesn't
appear during the init, and setting it to the same shouldn't be a problem... but
yeap, I agree the risk of taking panel down is high... let's move with the careful approach


Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>


> +		if (drm_dp_dpcd_read(&intel_dp->aux, DP_SOURCE_OUI, buf, sizeof(buf)) < 0)
> +			drm_err(&i915->drm, "Failed to read source OUI\n");
> +
> +		if (memcmp(oui, buf, sizeof(oui)) == 0)
> +			return;
> +	}
> +
> +	if (drm_dp_dpcd_write(&intel_dp->aux, DP_SOURCE_OUI, oui, sizeof(oui)) < 0)
> +		drm_err(&i915->drm, "Failed to write source OUI\n");
> +}
> +
>  /* If the sink supports it, try to set the power state appropriately */
>  void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
>  {
> @@ -3443,6 +3466,10 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode)
>  	} else {
>  		struct intel_lspcon *lspcon = dp_to_lspcon(intel_dp);
>  
> +		/* Write the source OUI as early as possible */
> +		if (intel_dp_is_edp(intel_dp))
> +			intel_edp_init_source_oui(intel_dp, false);
> +
>  		/*
>  		 * When turning on, we need to retry for 1ms to give the sink
>  		 * time to wake up.
> @@ -4607,6 +4634,12 @@ intel_edp_init_dpcd(struct intel_dp *intel_dp)
>  	if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
>  		intel_dp_get_dsc_sink_cap(intel_dp);
>  
> +	/*
> +	 * If needed, program our source OUI so we can make various Intel-specific AUX services
> +	 * available (such as HDR backlight controls)
> +	 */
> +	intel_edp_init_source_oui(intel_dp, true);
> +
>  	return true;
>  }
>  
> -- 
> 2.26.2
> 
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

  reply	other threads:[~2020-10-15 18:24 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-16 17:18 [Intel-gfx] [RFC v2 0/8] drm/i915: Add support for Intel's eDP backlight controls Lyude Paul
2020-09-16 17:18 ` Lyude Paul
2020-09-16 17:18 ` [Intel-gfx] [RFC v2 1/8] drm/i915/dp: Program source OUI on eDP panels Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-10-15 18:25   ` Rodrigo Vivi [this message]
2020-10-15 18:25     ` Rodrigo Vivi
2020-10-15 18:25     ` Rodrigo Vivi
2020-10-16 23:13   ` [Intel-gfx] " Vasily Khoruzhick
2020-10-16 23:13     ` Vasily Khoruzhick
2020-10-16 23:13     ` Vasily Khoruzhick
2020-11-26 10:51   ` [Intel-gfx] " Jani Nikula
2020-11-26 10:51     ` Jani Nikula
2020-11-26 10:51     ` Jani Nikula
2020-11-30 23:06     ` [Intel-gfx] " Lyude Paul
2020-11-30 23:06       ` Lyude Paul
2020-11-30 23:06       ` Lyude Paul
2020-09-16 17:18 ` [Intel-gfx] [RFC v2 2/8] drm/i915: Rename pwm_* backlight callbacks to ext_pwm_* Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-11-26 10:54   ` [Intel-gfx] " Jani Nikula
2020-11-26 10:54     ` Jani Nikula
2020-11-26 10:54     ` Jani Nikula
2020-09-16 17:18 ` [Intel-gfx] [RFC v2 3/8] drm/i915: Keep track of pwm-related backlight hooks separately Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-10-15 18:32   ` [Intel-gfx] " Rodrigo Vivi
2020-10-15 18:32     ` Rodrigo Vivi
2020-10-15 18:32     ` Rodrigo Vivi
2020-11-26  1:03   ` Dave Airlie
2020-11-26  1:03     ` Dave Airlie
2020-11-26  1:03     ` Dave Airlie
2020-11-26 11:57     ` Jani Nikula
2020-11-26 11:57       ` Jani Nikula
2020-11-26 11:57       ` Jani Nikula
2020-12-01  2:10       ` Lyude Paul
2020-12-01  2:10         ` Lyude Paul
2020-12-01  2:10         ` Lyude Paul
2020-11-30 23:19     ` Lyude Paul
2020-11-30 23:19       ` Lyude Paul
2020-11-30 23:19       ` Lyude Paul
2020-09-16 17:18 ` [Intel-gfx] [RFC v2 4/8] drm/i915/dp: Rename eDP VESA backlight interface functions Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-10-15 18:33   ` [Intel-gfx] " Rodrigo Vivi
2020-10-15 18:33     ` Rodrigo Vivi
2020-10-15 18:33     ` Rodrigo Vivi
2020-09-16 17:18 ` [Intel-gfx] [RFC v2 5/8] drm/i915/dp: Add register definitions for Intel HDR backlight interface Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18 ` [Intel-gfx] [RFC v2 6/8] drm/i915/dp: Enable Intel's HDR backlight interface (only SDR for now) Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-11-26 12:17   ` [Intel-gfx] " Jani Nikula
2020-11-26 12:17     ` Jani Nikula
2020-11-26 12:17     ` Jani Nikula
2020-09-16 17:18 ` [Intel-gfx] [RFC v2 7/8] drm/i915/dp: Allow forcing specific interfaces through enable_dpcd_backlight Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18 ` [Intel-gfx] [RFC v2 8/8] drm/dp: Revert "drm/dp: Introduce EDID-based quirks" Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 17:18   ` Lyude Paul
2020-09-16 19:05 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for Intel's eDP backlight controls (rev2) Patchwork
2020-09-16 19:30 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-16 22:45 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201015182542.GB2616619@intel.com \
    --to=rodrigo.vivi@intel.com \
    --cc=airlied@linux.ie \
    --cc=anarsoul@gmail.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=lyude@redhat.com \
    --cc=seanpaul@chromium.org \
    --cc=wambui.karugax@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.