From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Rob Herring <robh@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Jason Cooper <jason@lakedaemon.net>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [BUG] PCIe on Armada 388 broken since 5.9
Date: Thu, 22 Oct 2020 22:32:46 +0100 [thread overview]
Message-ID: <20201022213246.GV1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <20201022211821.GU1551@shell.armlinux.org.uk>
On Thu, Oct 22, 2020 at 10:18:21PM +0100, Russell King - ARM Linux admin wrote:
> Hi,
>
> It appears that PCIe on Armada 388 has been broken in 5.9. Here are
> the boot messages:
>
> mvebu-pcie soc:pcie: host bridge /soc/pcie ranges:
> mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000
> mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000
> mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000
> mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000
> mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000
> mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000
> mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000
> mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000
> mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000
> mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000
> mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000
> mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000
> mvebu-pcie soc:pcie: resource collision: [mem 0xf1080000-0xf1081fff] conflicts with pcie [mem 0xf1080000-0xf1081fff]
> mvebu-pcie: probe of soc:pcie failed with error -16
>
> This results in PCIe being entirely non-functional. At a guess, I'd
> say it's due to:
>
> commit c322fa0b3fa948010a278794e60c45ec860e4a1e
> Author: Rob Herring <robh@kernel.org>
> Date: Fri May 22 17:48:19 2020 -0600
>
> PCI: mvebu: Use struct pci_host_bridge.windows list directly
>
> There's no need to create a temporary resource list and then splice it to
> struct pci_host_bridge.windows list. Just use pci_host_bridge.windows
> directly. The necessary clean-up is already handled by the PCI core.
>
> Link: https://lore.kernel.org/r/20200522234832.954484-3-robh@kernel.org
> Signed-off-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> Cc: Jason Cooper <jason@lakedaemon.net>
Confirmed. Reverting this commit results in functioning PCIe.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
WARNING: multiple messages have this Message-ID (diff)
From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Rob Herring <robh@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Jason Cooper <jason@lakedaemon.net>
Cc: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [BUG] PCIe on Armada 388 broken since 5.9
Date: Thu, 22 Oct 2020 22:32:46 +0100 [thread overview]
Message-ID: <20201022213246.GV1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <20201022211821.GU1551@shell.armlinux.org.uk>
On Thu, Oct 22, 2020 at 10:18:21PM +0100, Russell King - ARM Linux admin wrote:
> Hi,
>
> It appears that PCIe on Armada 388 has been broken in 5.9. Here are
> the boot messages:
>
> mvebu-pcie soc:pcie: host bridge /soc/pcie ranges:
> mvebu-pcie soc:pcie: MEM 0x00f1080000..0x00f1081fff -> 0x0000080000
> mvebu-pcie soc:pcie: MEM 0x00f1040000..0x00f1041fff -> 0x0000040000
> mvebu-pcie soc:pcie: MEM 0x00f1044000..0x00f1045fff -> 0x0000044000
> mvebu-pcie soc:pcie: MEM 0x00f1048000..0x00f1049fff -> 0x0000048000
> mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0100000000
> mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0100000000
> mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0200000000
> mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0200000000
> mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0300000000
> mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0300000000
> mvebu-pcie soc:pcie: MEM 0xffffffffffffffff..0x00fffffffe -> 0x0400000000
> mvebu-pcie soc:pcie: IO 0xffffffffffffffff..0x00fffffffe -> 0x0400000000
> mvebu-pcie soc:pcie: resource collision: [mem 0xf1080000-0xf1081fff] conflicts with pcie [mem 0xf1080000-0xf1081fff]
> mvebu-pcie: probe of soc:pcie failed with error -16
>
> This results in PCIe being entirely non-functional. At a guess, I'd
> say it's due to:
>
> commit c322fa0b3fa948010a278794e60c45ec860e4a1e
> Author: Rob Herring <robh@kernel.org>
> Date: Fri May 22 17:48:19 2020 -0600
>
> PCI: mvebu: Use struct pci_host_bridge.windows list directly
>
> There's no need to create a temporary resource list and then splice it to
> struct pci_host_bridge.windows list. Just use pci_host_bridge.windows
> directly. The necessary clean-up is already handled by the PCI core.
>
> Link: https://lore.kernel.org/r/20200522234832.954484-3-robh@kernel.org
> Signed-off-by: Rob Herring <robh@kernel.org>
> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
> Cc: Jason Cooper <jason@lakedaemon.net>
Confirmed. Reverting this commit results in functioning PCIe.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
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next prev parent reply other threads:[~2020-10-22 21:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-22 21:18 [BUG] PCIe on Armada 388 broken since 5.9 Russell King - ARM Linux admin
2020-10-22 21:18 ` Russell King - ARM Linux admin
2020-10-22 21:32 ` Russell King - ARM Linux admin [this message]
2020-10-22 21:32 ` Russell King - ARM Linux admin
2020-10-22 22:04 ` Rob Herring
2020-10-22 22:04 ` Rob Herring
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