From: Krzysztof Kozlowski <krzk@kernel.org>
To: Adam Ford <aford173@gmail.com>
Cc: marex@denx.de, devicetree@vger.kernel.org,
Fabio Estevam <festevam@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
aford@beaconembedded.com, linux-kernel@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>,
linux-arm-kernel@lists.infradead.org, l.stach@pengutronix.de
Subject: Re: [PATCH] arm64: dts: imx8mm: Add GPU node
Date: Fri, 23 Oct 2020 11:34:46 +0200 [thread overview]
Message-ID: <20201023093446.GA42872@kozik-lap> (raw)
In-Reply-To: <20201022171639.773702-1-aford173@gmail.com>
On Thu, Oct 22, 2020 at 12:16:39PM -0500, Adam Ford wrote:
> According to the documentation from NXP, the i.MX8M Nano has a
> Vivante GC7000 Ultra Lite as its GPU core.
>
> With this patch, the Etnaviv driver presents the GPU as:
> etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6203
>
> It uses the GPCV2 controller to enable the power domain for the GPU.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
> ---
> This patch depends on a series located:
> https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=368903
> and
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 605e6dbd2c6f..62c8cd3dea7c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -4,6 +4,8 @@
> */
>
> #include <dt-bindings/clock/imx8mn-clock.h>
> +#include <dt-bindings/power/imx8mn-power.h>
> +#include <dt-bindings/reset/imx8mq-reset.h>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/input/input.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -1019,6 +1021,31 @@ gpmi: nand-controller@33002000 {
> status = "disabled";
> };
>
> + gpu: gpu@38000000 {
> + compatible = "vivante,gc";
> + reg = <0x38000000 0x8000>;
> + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MN_CLK_GPU_AHB>,
> + <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
> + <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
> + <&clk IMX8MN_CLK_GPU_SHADER_DIV>;
> + clock-names = "reg", "bus", "core", "shader";
> + assigned-clocks = <&clk IMX8MN_CLK_GPU_CORE_SRC>,
> + <&clk IMX8MN_CLK_GPU_SHADER_SRC>,
> + <&clk IMX8MN_CLK_GPU_AXI>,
> + <&clk IMX8MN_CLK_GPU_AHB>,
> + <&clk IMX8MN_GPU_PLL>,
> + <&clk IMX8MN_CLK_GPU_CORE_DIV>,
> + <&clk IMX8MN_CLK_GPU_SHADER_DIV>;
> + assigned-clock-parents = <&clk IMX8MN_GPU_PLL_OUT>,
> + <&clk IMX8MN_GPU_PLL_OUT>,
> + <&clk IMX8MN_SYS_PLL1_800M>,
> + <&clk IMX8MN_SYS_PLL1_800M>;
> + assigned-clock-rates = <0>, <0>, <800000000>, <400000000>, <1200000000>,
> + <400000000>, <400000000>;
Plaese indent it till '=' and put each entry in new line. This will
match other 'assigned-clock' properties.
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: Adam Ford <aford173@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org, marex@denx.de,
aford@beaconembedded.com, l.stach@pengutronix.de,
Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] arm64: dts: imx8mm: Add GPU node
Date: Fri, 23 Oct 2020 11:34:46 +0200 [thread overview]
Message-ID: <20201023093446.GA42872@kozik-lap> (raw)
In-Reply-To: <20201022171639.773702-1-aford173@gmail.com>
On Thu, Oct 22, 2020 at 12:16:39PM -0500, Adam Ford wrote:
> According to the documentation from NXP, the i.MX8M Nano has a
> Vivante GC7000 Ultra Lite as its GPU core.
>
> With this patch, the Etnaviv driver presents the GPU as:
> etnaviv-gpu 38000000.gpu: model: GC7000, revision: 6203
>
> It uses the GPCV2 controller to enable the power domain for the GPU.
>
> Signed-off-by: Adam Ford <aford173@gmail.com>
> ---
> This patch depends on a series located:
> https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=368903
> and
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index 605e6dbd2c6f..62c8cd3dea7c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -4,6 +4,8 @@
> */
>
> #include <dt-bindings/clock/imx8mn-clock.h>
> +#include <dt-bindings/power/imx8mn-power.h>
> +#include <dt-bindings/reset/imx8mq-reset.h>
> #include <dt-bindings/gpio/gpio.h>
> #include <dt-bindings/input/input.h>
> #include <dt-bindings/interrupt-controller/arm-gic.h>
> @@ -1019,6 +1021,31 @@ gpmi: nand-controller@33002000 {
> status = "disabled";
> };
>
> + gpu: gpu@38000000 {
> + compatible = "vivante,gc";
> + reg = <0x38000000 0x8000>;
> + interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clk IMX8MN_CLK_GPU_AHB>,
> + <&clk IMX8MN_CLK_GPU_BUS_ROOT>,
> + <&clk IMX8MN_CLK_GPU_CORE_ROOT>,
> + <&clk IMX8MN_CLK_GPU_SHADER_DIV>;
> + clock-names = "reg", "bus", "core", "shader";
> + assigned-clocks = <&clk IMX8MN_CLK_GPU_CORE_SRC>,
> + <&clk IMX8MN_CLK_GPU_SHADER_SRC>,
> + <&clk IMX8MN_CLK_GPU_AXI>,
> + <&clk IMX8MN_CLK_GPU_AHB>,
> + <&clk IMX8MN_GPU_PLL>,
> + <&clk IMX8MN_CLK_GPU_CORE_DIV>,
> + <&clk IMX8MN_CLK_GPU_SHADER_DIV>;
> + assigned-clock-parents = <&clk IMX8MN_GPU_PLL_OUT>,
> + <&clk IMX8MN_GPU_PLL_OUT>,
> + <&clk IMX8MN_SYS_PLL1_800M>,
> + <&clk IMX8MN_SYS_PLL1_800M>;
> + assigned-clock-rates = <0>, <0>, <800000000>, <400000000>, <1200000000>,
> + <400000000>, <400000000>;
Plaese indent it till '=' and put each entry in new line. This will
match other 'assigned-clock' properties.
Best regards,
Krzysztof
next prev parent reply other threads:[~2020-10-23 9:36 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-22 17:16 [PATCH] arm64: dts: imx8mm: Add GPU node Adam Ford
2020-10-22 17:16 ` Adam Ford
2020-10-22 18:17 ` Marek Vasut
2020-10-22 18:17 ` Marek Vasut
2020-10-22 18:31 ` Adam Ford
2020-10-22 18:31 ` Adam Ford
2020-10-23 8:25 ` Lucas Stach
2020-10-23 8:25 ` Lucas Stach
2020-10-23 11:07 ` Adam Ford
2020-10-23 11:07 ` Adam Ford
2020-10-23 9:34 ` Krzysztof Kozlowski [this message]
2020-10-23 9:34 ` Krzysztof Kozlowski
2020-10-23 23:13 ` kernel test robot
2020-10-23 23:13 ` kernel test robot
2020-10-24 11:52 ` kernel test robot
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