From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 01/19] drm/i915: s/PORT_TC/TC_PORT_/
Date: Fri, 23 Oct 2020 21:08:21 +0300 [thread overview]
Message-ID: <20201023180821.GA6112@intel.com> (raw)
In-Reply-To: <20201023175724.jcmjndbmtr3rjhws@ldmartin-desk1>
On Fri, Oct 23, 2020 at 10:57:24AM -0700, Lucas De Marchi wrote:
> On Fri, Oct 23, 2020 at 04:34:02PM +0300, Ville Syrjälä wrote:
> >@@ -8352,19 +8352,19 @@ enum {
> > #define SDE_DDI_HOTPLUG_ICP(port) (1 << ((port) + 16))
> > #define SDE_DDI_MASK_ICP (SDE_DDI_HOTPLUG_ICP(PORT_B) | \
> > SDE_DDI_HOTPLUG_ICP(PORT_A))
> >-#define SDE_TC_MASK_ICP (SDE_TC_HOTPLUG_ICP(PORT_TC4) | \
> >- SDE_TC_HOTPLUG_ICP(PORT_TC3) | \
> >- SDE_TC_HOTPLUG_ICP(PORT_TC2) | \
> >- SDE_TC_HOTPLUG_ICP(PORT_TC1))
> >+#define SDE_TC_MASK_ICP (SDE_TC_HOTPLUG_ICP(TC_PORT_4) | \
> >+ SDE_TC_HOTPLUG_ICP(TC_PORT_3) | \
> >+ SDE_TC_HOTPLUG_ICP(TC_PORT_2) | \
> >+ SDE_TC_HOTPLUG_ICP(TC_PORT_1))
>
> At some point we may also want to add *HOTPLUG* to these macros to
> signify what it really is. For another day.
Hmm. I have a feeling I end up removing these before the end of the
series. Ah no, that was in a followup patch I played around with.
But I'm not convinced that patch (making the IIR readout mask
calculation also based on the encoders present) is actually a
necessary thing. I guess it would be if some if the hpd bits get
repurposed and we still want to share the irq handler between
platforms with conflicting bits.
>
>
> Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
>
> Lucas De Marchi
>
> > #define SDE_DDI_MASK_TGP (SDE_DDI_HOTPLUG_ICP(PORT_C) | \
> > SDE_DDI_HOTPLUG_ICP(PORT_B) | \
> > SDE_DDI_HOTPLUG_ICP(PORT_A))
> >-#define SDE_TC_MASK_TGP (SDE_TC_HOTPLUG_ICP(PORT_TC6) | \
> >- SDE_TC_HOTPLUG_ICP(PORT_TC5) | \
> >- SDE_TC_HOTPLUG_ICP(PORT_TC4) | \
> >- SDE_TC_HOTPLUG_ICP(PORT_TC3) | \
> >- SDE_TC_HOTPLUG_ICP(PORT_TC2) | \
> >- SDE_TC_HOTPLUG_ICP(PORT_TC1))
> >+#define SDE_TC_MASK_TGP (SDE_TC_HOTPLUG_ICP(TC_PORT_6) | \
> >+ SDE_TC_HOTPLUG_ICP(TC_PORT_5) | \
> >+ SDE_TC_HOTPLUG_ICP(TC_PORT_4) | \
> >+ SDE_TC_HOTPLUG_ICP(TC_PORT_3) | \
> >+ SDE_TC_HOTPLUG_ICP(TC_PORT_2) | \
> >+ SDE_TC_HOTPLUG_ICP(TC_PORT_1))
> >
> > #define SDEISR _MMIO(0xc4000)
> > #define SDEIMR _MMIO(0xc4004)
> >@@ -8449,15 +8449,15 @@ enum {
> >
> > #define ICP_DDI_HPD_ENABLE_MASK (SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_B) | \
> > SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_A))
> >-#define ICP_TC_HPD_ENABLE_MASK (ICP_TC_HPD_ENABLE(PORT_TC4) | \
> >- ICP_TC_HPD_ENABLE(PORT_TC3) | \
> >- ICP_TC_HPD_ENABLE(PORT_TC2) | \
> >- ICP_TC_HPD_ENABLE(PORT_TC1))
> >+#define ICP_TC_HPD_ENABLE_MASK (ICP_TC_HPD_ENABLE(TC_PORT_4) | \
> >+ ICP_TC_HPD_ENABLE(TC_PORT_3) | \
> >+ ICP_TC_HPD_ENABLE(TC_PORT_2) | \
> >+ ICP_TC_HPD_ENABLE(TC_PORT_1))
> > #define TGP_DDI_HPD_ENABLE_MASK (SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_C) | \
> > SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_B) | \
> > SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_A))
> >-#define TGP_TC_HPD_ENABLE_MASK (ICP_TC_HPD_ENABLE(PORT_TC6) | \
> >- ICP_TC_HPD_ENABLE(PORT_TC5) | \
> >+#define TGP_TC_HPD_ENABLE_MASK (ICP_TC_HPD_ENABLE(TC_PORT_6) | \
> >+ ICP_TC_HPD_ENABLE(TC_PORT_5) | \
> > ICP_TC_HPD_ENABLE_MASK)
> >
> > #define _PCH_DPLL_A 0xc6014
> >@@ -10315,9 +10315,9 @@ enum skl_power_gate {
> > #define ICL_DPCLKA_CFGCR0 _MMIO(0x164280)
> > #define ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy) (1 << _PICK(phy, 10, 11, 24))
> > #define RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy) REG_BIT((phy) + 10)
> >-#define ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port) (1 << ((tc_port) < PORT_TC4 ? \
> >+#define ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port) (1 << ((tc_port) < TC_PORT_4 ? \
> > (tc_port) + 12 : \
> >- (tc_port) - PORT_TC4 + 21))
> >+ (tc_port) - TC_PORT_4 + 21))
> > #define ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy) ((phy) * 2)
> > #define ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy) (3 << ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy))
> > #define ICL_DPCLKA_CFGCR0_DDI_CLK_SEL(pll, phy) ((pll) << ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy))
> >--
> >2.26.2
> >
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2020-10-23 18:08 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-23 13:34 [Intel-gfx] [PATCH v2 00/19] drm/i915: Futher cleanup around hpd pins and port identfiers Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 01/19] drm/i915: s/PORT_TC/TC_PORT_/ Ville Syrjala
2020-10-23 17:57 ` Lucas De Marchi
2020-10-23 18:08 ` Ville Syrjälä [this message]
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 02/19] drm/i915: Add PORT_TCn aliases to enum port Ville Syrjala
2020-10-23 19:02 ` Lucas De Marchi
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 03/19] drm/i915: Give DDI encoders even better names Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 04/19] drm/i915: Introduce AUX_CH_USBCn Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 05/19] drm/i915: Pimp AUX CH names Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 06/19] drm/i915: Use AUX_CH_USBCn for the RKL VBT AUX CH setup Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 07/19] drm/i915: Parametrize BXT_DE_PORT_HP_DDI with hpd_pin Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 08/19] drm/i915: Introduce GEN8_DE_PORT_HOTPLUG() Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 09/19] drm/i915: s/port/hpd_pin/ for icp+ ddi hpd bits Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 10/19] drm/i915: s/tc_port/hpd_pin/ in GEN11_{TC, TBT}_HOTPLUG() Ville Syrjala
2020-10-23 19:19 ` Lucas De Marchi
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 11/19] drm/i915: s/tc_port/hpd_pin/ in icp+ TC hotplug bits Ville Syrjala
2020-10-23 19:20 ` Lucas De Marchi
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 12/19] drm/i915: Relocate intel_hpd_{enabled, hotplug}_irqs() Ville Syrjala
2020-10-23 19:21 ` Lucas De Marchi
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 13/19] drm/i915: Split gen11_hpd_detection_setup() into tc vs. tbt variants Ville Syrjala
2020-10-23 19:23 ` Lucas De Marchi
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 14/19] drm/i915: Don't enable hpd detection logic from irq_postinstall() Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 15/19] drm/i915: Rename 'tmp_mask' Ville Syrjala
2020-10-23 19:25 ` Lucas De Marchi
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 16/19] drm/i915: Remove the per-plaform IIR HPD masking Ville Syrjala
2020-10-23 19:29 ` Lucas De Marchi
2020-10-23 19:44 ` Ville Syrjälä
2020-10-28 1:00 ` Lucas De Marchi
2020-10-23 19:30 ` Lucas De Marchi
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 17/19] drm/i915: Enable hpd logic only for ports that are present Ville Syrjala
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 18/19] drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+ Ville Syrjala
2020-10-23 19:33 ` Lucas De Marchi
2020-10-23 13:34 ` [Intel-gfx] [PATCH v2 19/19] drm/i915: Get rid of ibx_irq_pre_postinstall() Ville Syrjala
2020-10-23 15:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Futher cleanup around hpd pins and port identfiers (rev4) Patchwork
2020-10-23 15:41 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-23 16:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-23 19:46 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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