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From: Catalin Marinas <catalin.marinas@arm.com>
To: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org, linux-arch@vger.kernel.org,
	Marc Zyngier <maz@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Morten Rasmussen <morten.rasmussen@arm.com>,
	Qais Yousef <qais.yousef@arm.com>,
	Suren Baghdasaryan <surenb@google.com>,
	kernel-team@android.com
Subject: Re: [PATCH 2/6] arm64: Allow mismatched 32-bit EL0 support
Date: Wed, 28 Oct 2020 18:56:21 +0000	[thread overview]
Message-ID: <20201028185620.GK13345@gaia> (raw)
In-Reply-To: <20201028124049.GC28091@willie-the-truck>

On Wed, Oct 28, 2020 at 12:40:49PM +0000, Will Deacon wrote:
> On Wed, Oct 28, 2020 at 11:49:46AM +0000, Catalin Marinas wrote:
> > On Wed, Oct 28, 2020 at 11:23:43AM +0000, Will Deacon wrote:
> > > On Wed, Oct 28, 2020 at 11:22:06AM +0000, Catalin Marinas wrote:
> > > > On Wed, Oct 28, 2020 at 11:17:13AM +0000, Will Deacon wrote:
> > > > > On Wed, Oct 28, 2020 at 11:12:04AM +0000, Catalin Marinas wrote:
> > > > > > On Tue, Oct 27, 2020 at 09:51:14PM +0000, Will Deacon wrote:
> > > > > > > +static bool has_32bit_el0(const struct arm64_cpu_capabilities *entry, int scope)
> > > > > > > +{
> > > > > > > +	return has_cpuid_feature(entry, scope) || __allow_mismatched_32bit_el0;
> > > > > > > +}
> > > > > > > +
> > > > > > >  static bool has_useable_gicv3_cpuif(const struct arm64_cpu_capabilities *entry, int scope)
> > > > > > >  {
> > > > > > >  	bool has_sre;
> > > > > > > @@ -1803,7 +1851,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> > > > > > >  		.desc = "32-bit EL0 Support",
> > > > > > >  		.capability = ARM64_HAS_32BIT_EL0,
> > > > > > >  		.type = ARM64_CPUCAP_SYSTEM_FEATURE,
> > > > > > > -		.matches = has_cpuid_feature,
> > > > > > > +		.matches = has_32bit_el0,
> > > > > > 
> > > > > > Ah, so this one reports 32-bit EL0 support even if no CPU actually
> > > > > > supports 32-bit (passing the command line option on TX2 would come up
> > > > > > with 32-bit EL0 in dmesg). I'd rather hide the .desc above and print the
> > > > > > information elsewhere when have at least one CPU supporting this.
> > > > > 
> > > > > Yeah, the problem is if a CPU with 32-bit EL0 support was late-onlined,
> > > > > then we would have 32-bit support, so I think this is an oddity that you
> > > > > get when the command line is passed. That said, I could nobble .desc and
> > > > > print it from the .matches function, with a slightly different message
> > > > > when the command line is passed.
> > > > 
> > > > I think we could do a pr_info_once() in update_32bit_cpu_features().
> > > 
> > > Is that called on a system with one CPU?
> > 
> > Ah, it's not.
> > 
> > Anyway, I see your reasoning behind the late CPUs but I don't
> > particularly like abusing the cpufeature support to pretend a
> > SYSTEM_FEATURE is available before knowing any CPU has it (maybe we do
> > it in other cases, I haven't checked).
> 
> Hmm, but that's exactly what this cmdline option is about. We pretend that
> the system has 32-bit EL0 when normally we would say that we don't.

So that's more about force-enabling 32-bit irrespective of whether any
CPU supports it (not just in the mismatched/asymmetric case). Of course,
if the aarch32_el0 mask is empty, the apps would get SIGKILL'ed.

> > Could we not instead add a new feature for asymmetric support that's
> > defined as ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE? This would be allowed
> > for late CPUs and we keep the system_supports_32bit_el0() unchanged.
> 
> I really don't think this gains us anything.

It saves us having to explain to someone passing this option on a TX2
why personality(PER_LINUX32) and even execve() appear to work (well,
until SIGKILL). The lscpu tool, for example, uses personality() to
display whether the CPUs support 32-bit.

Also with PER_LINUX32, /proc/cpuinfo shows the 32-bit HWCAPs. We have
compat_elf_hwcap pre-populated with some stuff which is entirely untrue
if AArch32 is missing.

Thinking about the COMPAT_HWCAPs, do we actually populate them properly
on an asymmetric system if the boot CPU is not AArch32-capable? In my
original patch I had to defer populating boot_cpu_data with AArch32
information until a capable CPU was found. If not,
update_32bit_cpu_features() will set most 32-bit features to 0.

> The current users of system_supports_32bit_el0() are:
> 
>   - The ELF loader
>   - CPU feature sanitisation code
>   - Personality syscall

There three need a relaxed system_supports_32bit_el0(), so we could
change it to check a new relaxed feature.

>   - KVM

Here I think we need the stronger guarantee, no 32-bit allowed in
guests (the original symmetric feature check).

> and, afaict, all of these would need to check the new feature if we added
> it.  I think it would also mean that at least one 32-bit capable CPU would
> have to boot early in order for the new feature to be advertised, which
> feels like an artificial restriction to me, particularly as you could just
> offline it immediately.

How strong requirement is to allow late CPUs here? I think we'd miss the
COMPAT_HWCAPs as we no longer populate them once user-space started,
they are actually setup via smp_cpus_done() -> setup_cpu_features().

-- 
Catalin

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Will Deacon <will@kernel.org>
Cc: linux-arch@vger.kernel.org, kernel-team@android.com,
	Peter Zijlstra <peterz@infradead.org>,
	Marc Zyngier <maz@kernel.org>, Qais Yousef <qais.yousef@arm.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Suren Baghdasaryan <surenb@google.com>,
	Morten Rasmussen <morten.rasmussen@arm.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 2/6] arm64: Allow mismatched 32-bit EL0 support
Date: Wed, 28 Oct 2020 18:56:21 +0000	[thread overview]
Message-ID: <20201028185620.GK13345@gaia> (raw)
In-Reply-To: <20201028124049.GC28091@willie-the-truck>

On Wed, Oct 28, 2020 at 12:40:49PM +0000, Will Deacon wrote:
> On Wed, Oct 28, 2020 at 11:49:46AM +0000, Catalin Marinas wrote:
> > On Wed, Oct 28, 2020 at 11:23:43AM +0000, Will Deacon wrote:
> > > On Wed, Oct 28, 2020 at 11:22:06AM +0000, Catalin Marinas wrote:
> > > > On Wed, Oct 28, 2020 at 11:17:13AM +0000, Will Deacon wrote:
> > > > > On Wed, Oct 28, 2020 at 11:12:04AM +0000, Catalin Marinas wrote:
> > > > > > On Tue, Oct 27, 2020 at 09:51:14PM +0000, Will Deacon wrote:
> > > > > > > +static bool has_32bit_el0(const struct arm64_cpu_capabilities *entry, int scope)
> > > > > > > +{
> > > > > > > +	return has_cpuid_feature(entry, scope) || __allow_mismatched_32bit_el0;
> > > > > > > +}
> > > > > > > +
> > > > > > >  static bool has_useable_gicv3_cpuif(const struct arm64_cpu_capabilities *entry, int scope)
> > > > > > >  {
> > > > > > >  	bool has_sre;
> > > > > > > @@ -1803,7 +1851,7 @@ static const struct arm64_cpu_capabilities arm64_features[] = {
> > > > > > >  		.desc = "32-bit EL0 Support",
> > > > > > >  		.capability = ARM64_HAS_32BIT_EL0,
> > > > > > >  		.type = ARM64_CPUCAP_SYSTEM_FEATURE,
> > > > > > > -		.matches = has_cpuid_feature,
> > > > > > > +		.matches = has_32bit_el0,
> > > > > > 
> > > > > > Ah, so this one reports 32-bit EL0 support even if no CPU actually
> > > > > > supports 32-bit (passing the command line option on TX2 would come up
> > > > > > with 32-bit EL0 in dmesg). I'd rather hide the .desc above and print the
> > > > > > information elsewhere when have at least one CPU supporting this.
> > > > > 
> > > > > Yeah, the problem is if a CPU with 32-bit EL0 support was late-onlined,
> > > > > then we would have 32-bit support, so I think this is an oddity that you
> > > > > get when the command line is passed. That said, I could nobble .desc and
> > > > > print it from the .matches function, with a slightly different message
> > > > > when the command line is passed.
> > > > 
> > > > I think we could do a pr_info_once() in update_32bit_cpu_features().
> > > 
> > > Is that called on a system with one CPU?
> > 
> > Ah, it's not.
> > 
> > Anyway, I see your reasoning behind the late CPUs but I don't
> > particularly like abusing the cpufeature support to pretend a
> > SYSTEM_FEATURE is available before knowing any CPU has it (maybe we do
> > it in other cases, I haven't checked).
> 
> Hmm, but that's exactly what this cmdline option is about. We pretend that
> the system has 32-bit EL0 when normally we would say that we don't.

So that's more about force-enabling 32-bit irrespective of whether any
CPU supports it (not just in the mismatched/asymmetric case). Of course,
if the aarch32_el0 mask is empty, the apps would get SIGKILL'ed.

> > Could we not instead add a new feature for asymmetric support that's
> > defined as ARM64_CPUCAP_WEAK_LOCAL_CPU_FEATURE? This would be allowed
> > for late CPUs and we keep the system_supports_32bit_el0() unchanged.
> 
> I really don't think this gains us anything.

It saves us having to explain to someone passing this option on a TX2
why personality(PER_LINUX32) and even execve() appear to work (well,
until SIGKILL). The lscpu tool, for example, uses personality() to
display whether the CPUs support 32-bit.

Also with PER_LINUX32, /proc/cpuinfo shows the 32-bit HWCAPs. We have
compat_elf_hwcap pre-populated with some stuff which is entirely untrue
if AArch32 is missing.

Thinking about the COMPAT_HWCAPs, do we actually populate them properly
on an asymmetric system if the boot CPU is not AArch32-capable? In my
original patch I had to defer populating boot_cpu_data with AArch32
information until a capable CPU was found. If not,
update_32bit_cpu_features() will set most 32-bit features to 0.

> The current users of system_supports_32bit_el0() are:
> 
>   - The ELF loader
>   - CPU feature sanitisation code
>   - Personality syscall

There three need a relaxed system_supports_32bit_el0(), so we could
change it to check a new relaxed feature.

>   - KVM

Here I think we need the stronger guarantee, no 32-bit allowed in
guests (the original symmetric feature check).

> and, afaict, all of these would need to check the new feature if we added
> it.  I think it would also mean that at least one 32-bit capable CPU would
> have to boot early in order for the new feature to be advertised, which
> feels like an artificial restriction to me, particularly as you could just
> offline it immediately.

How strong requirement is to allow late CPUs here? I think we'd miss the
COMPAT_HWCAPs as we no longer populate them once user-space started,
they are actually setup via smp_cpus_done() -> setup_cpu_features().

-- 
Catalin

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-10-28 22:35 UTC|newest]

Thread overview: 96+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-27 21:51 [PATCH 0/6] An alternative series for asymmetric AArch32 systems Will Deacon
2020-10-27 21:51 ` Will Deacon
2020-10-27 21:51 ` [PATCH 1/6] KVM: arm64: Handle Asymmetric " Will Deacon
2020-10-27 21:51   ` Will Deacon
2020-10-27 21:51 ` [PATCH 2/6] arm64: Allow mismatched 32-bit EL0 support Will Deacon
2020-10-27 21:51   ` Will Deacon
2020-10-28 11:12   ` Catalin Marinas
2020-10-28 11:12     ` Catalin Marinas
2020-10-28 11:17     ` Will Deacon
2020-10-28 11:17       ` Will Deacon
2020-10-28 11:22       ` Catalin Marinas
2020-10-28 11:22         ` Catalin Marinas
2020-10-28 11:23         ` Will Deacon
2020-10-28 11:23           ` Will Deacon
2020-10-28 11:49           ` Catalin Marinas
2020-10-28 11:49             ` Catalin Marinas
2020-10-28 12:40             ` Will Deacon
2020-10-28 12:40               ` Will Deacon
2020-10-28 18:56               ` Catalin Marinas [this message]
2020-10-28 18:56                 ` Catalin Marinas
2020-10-29 22:20                 ` Will Deacon
2020-10-29 22:20                   ` Will Deacon
2020-10-30 11:18                   ` Catalin Marinas
2020-10-30 11:18                     ` Catalin Marinas
2020-10-30 16:13                     ` Will Deacon
2020-10-30 16:13                       ` Will Deacon
2020-11-02 11:44                       ` Catalin Marinas
2020-11-02 11:44                         ` Catalin Marinas
2020-11-05 21:38                         ` Will Deacon
2020-11-05 21:38                           ` Will Deacon
2020-11-06 12:54                           ` Qais Yousef
2020-11-06 12:54                             ` Qais Yousef
2020-11-06 13:00                             ` Will Deacon
2020-11-06 13:00                               ` Will Deacon
2020-11-06 14:48                               ` Qais Yousef
2020-11-06 14:48                                 ` Qais Yousef
2020-11-09 13:52                                 ` Will Deacon
2020-11-09 13:52                                   ` Will Deacon
2020-11-11 16:27                                   ` Qais Yousef
2020-11-11 16:27                                     ` Qais Yousef
2020-11-12 10:24                                     ` Will Deacon
2020-11-12 10:24                                       ` Will Deacon
2020-11-12 11:55                                       ` Qais Yousef
2020-11-12 11:55                                         ` Qais Yousef
2020-11-12 16:49                                         ` Qais Yousef
2020-11-12 16:49                                           ` Qais Yousef
2020-11-12 17:06                                           ` Marc Zyngier
2020-11-12 17:06                                             ` Marc Zyngier
2020-11-12 17:36                                             ` Qais Yousef
2020-11-12 17:36                                               ` Qais Yousef
2020-11-12 17:44                                               ` Will Deacon
2020-11-12 17:44                                                 ` Will Deacon
2020-11-12 17:36                                           ` Will Deacon
2020-11-12 17:36                                             ` Will Deacon
2020-11-13 10:45                                             ` Qais Yousef
2020-11-13 10:45                                               ` Qais Yousef
2020-11-06 14:30                           ` Catalin Marinas
2020-11-06 14:30                             ` Catalin Marinas
2020-10-28 11:18   ` Catalin Marinas
2020-10-28 11:18     ` Catalin Marinas
2020-10-28 11:21     ` Will Deacon
2020-10-28 11:21       ` Will Deacon
2020-10-27 21:51 ` [PATCH 3/6] KVM: arm64: Kill 32-bit vCPUs on systems with mismatched " Will Deacon
2020-10-27 21:51   ` Will Deacon
2020-10-27 21:51 ` [PATCH 4/6] arm64: Kill 32-bit applications scheduled on 64-bit-only CPUs Will Deacon
2020-10-27 21:51   ` Will Deacon
2020-10-28 12:10   ` Catalin Marinas
2020-10-28 12:10     ` Catalin Marinas
2020-10-28 12:36     ` Will Deacon
2020-10-28 12:36       ` Will Deacon
2020-10-27 21:51 ` [PATCH 5/6] arm64: Advertise CPUs capable of running 32-bit applcations in sysfs Will Deacon
2020-10-27 21:51   ` Will Deacon
2020-10-28  8:37   ` Greg Kroah-Hartman
2020-10-28  8:37     ` Greg Kroah-Hartman
2020-10-28  9:51     ` Will Deacon
2020-10-28  9:51       ` Will Deacon
2020-10-28 12:15   ` Catalin Marinas
2020-10-28 12:15     ` Catalin Marinas
2020-10-28 12:27     ` Will Deacon
2020-10-28 12:27       ` Will Deacon
2020-10-28 15:14       ` Catalin Marinas
2020-10-28 15:14         ` Catalin Marinas
2020-10-28 15:35         ` Will Deacon
2020-10-28 15:35           ` Will Deacon
2020-10-27 21:51 ` [PATCH 6/6] arm64: Hook up cmdline parameter to allow mismatched 32-bit EL0 Will Deacon
2020-10-27 21:51   ` Will Deacon
2020-10-29 18:42 ` [PATCH 0/6] An alternative series for asymmetric AArch32 systems Suren Baghdasaryan
2020-10-29 18:42   ` Suren Baghdasaryan
2020-10-29 22:17   ` Will Deacon
2020-10-29 22:17     ` Will Deacon
2020-10-30 16:16 ` Marc Zyngier
2020-10-30 16:16   ` Marc Zyngier
2020-10-30 16:24   ` Will Deacon
2020-10-30 16:24     ` Will Deacon
2020-10-30 17:04     ` Marc Zyngier
2020-10-30 17:04       ` Marc Zyngier

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