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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Christophe Kerello <christophe.kerello@st.com>
Cc: richard@nod.at, linux-stm32@st-md-mailman.stormreply.com,
	linux-mtd@lists.infradead.org, vigneshr@ti.com,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] mtd: rawnand: stm32_fmc2: fix broken ECC
Date: Fri, 30 Oct 2020 14:36:27 +0100	[thread overview]
Message-ID: <20201030143627.1a910cbc@xps13> (raw)
In-Reply-To: <1604064819-26861-1-git-send-email-christophe.kerello@st.com>

Hi Christophe,

Christophe Kerello <christophe.kerello@st.com> wrote on Fri, 30 Oct
2020 14:33:39 +0100:

> Since commit d7157ff49a5b ("mtd: rawnand: Use the ECC framework user
> input parsing bits"), ECC are broken in FMC2 driver in case of
> nand-ecc-step-size and nand-ecc-strength are not set in the device tree.
> To avoid this issue, the default settings are now set in
> stm32_fmc2_nfc_attach_chip function.
> 
> Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
> Fixes: d7157ff49a5b ("mtd: rawnand: Use the ECC framework user input parsing bits")
> ---
> Changes in v2:
>  - move default ECC settings in stm32_fmc2_nfc_attach_chip function.
> 
>  drivers/mtd/nand/raw/stm32_fmc2_nand.c | 15 ++++++++-------
>  1 file changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> index b31a581..550bda4 100644
> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> @@ -1708,6 +1708,13 @@ static int stm32_fmc2_nfc_attach_chip(struct nand_chip *chip)
>  		return -EINVAL;
>  	}
>  
> +	/* Default ECC settings in case they are not set in the device tree */
> +	if (!chip->ecc.size)
> +		chip->ecc.size = FMC2_ECC_STEP_SIZE;
> +
> +	if (!chip->ecc.strength)
> +		chip->ecc.strength = FMC2_ECC_BCH8;
> +
>  	ret = nand_ecc_choose_conf(chip, &stm32_fmc2_nfc_ecc_caps,
>  				   mtd->oobsize - FMC2_BBM_LEN);
>  	if (ret) {
> @@ -1727,8 +1734,7 @@ static int stm32_fmc2_nfc_attach_chip(struct nand_chip *chip)
>  
>  	mtd_set_ooblayout(mtd, &stm32_fmc2_nfc_ooblayout_ops);
>  
> -	if (chip->options & NAND_BUSWIDTH_16)
> -		stm32_fmc2_nfc_set_buswidth_16(nfc, true);
> +	stm32_fmc2_nfc_setup(chip);
>  
>  	return 0;
>  }
> @@ -1952,11 +1958,6 @@ static int stm32_fmc2_nfc_probe(struct platform_device *pdev)
>  	chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE |
>  			 NAND_USES_DMA;
>  
> -	/* Default ECC settings */
> -	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
> -	chip->ecc.size = FMC2_ECC_STEP_SIZE;
> -	chip->ecc.strength = FMC2_ECC_BCH8;
> -
>  	/* Scan to find existence of the device */
>  	ret = nand_scan(chip, nand->ncs);
>  	if (ret)

This overall looks very good to me, thanks for this update!

Cheers,
Miquèl

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Christophe Kerello <christophe.kerello@st.com>
Cc: <richard@nod.at>, <vigneshr@ti.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-stm32@st-md-mailman.stormreply.com>
Subject: Re: [PATCH v2] mtd: rawnand: stm32_fmc2: fix broken ECC
Date: Fri, 30 Oct 2020 14:36:27 +0100	[thread overview]
Message-ID: <20201030143627.1a910cbc@xps13> (raw)
In-Reply-To: <1604064819-26861-1-git-send-email-christophe.kerello@st.com>

Hi Christophe,

Christophe Kerello <christophe.kerello@st.com> wrote on Fri, 30 Oct
2020 14:33:39 +0100:

> Since commit d7157ff49a5b ("mtd: rawnand: Use the ECC framework user
> input parsing bits"), ECC are broken in FMC2 driver in case of
> nand-ecc-step-size and nand-ecc-strength are not set in the device tree.
> To avoid this issue, the default settings are now set in
> stm32_fmc2_nfc_attach_chip function.
> 
> Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
> Fixes: d7157ff49a5b ("mtd: rawnand: Use the ECC framework user input parsing bits")
> ---
> Changes in v2:
>  - move default ECC settings in stm32_fmc2_nfc_attach_chip function.
> 
>  drivers/mtd/nand/raw/stm32_fmc2_nand.c | 15 ++++++++-------
>  1 file changed, 8 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> index b31a581..550bda4 100644
> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
> @@ -1708,6 +1708,13 @@ static int stm32_fmc2_nfc_attach_chip(struct nand_chip *chip)
>  		return -EINVAL;
>  	}
>  
> +	/* Default ECC settings in case they are not set in the device tree */
> +	if (!chip->ecc.size)
> +		chip->ecc.size = FMC2_ECC_STEP_SIZE;
> +
> +	if (!chip->ecc.strength)
> +		chip->ecc.strength = FMC2_ECC_BCH8;
> +
>  	ret = nand_ecc_choose_conf(chip, &stm32_fmc2_nfc_ecc_caps,
>  				   mtd->oobsize - FMC2_BBM_LEN);
>  	if (ret) {
> @@ -1727,8 +1734,7 @@ static int stm32_fmc2_nfc_attach_chip(struct nand_chip *chip)
>  
>  	mtd_set_ooblayout(mtd, &stm32_fmc2_nfc_ooblayout_ops);
>  
> -	if (chip->options & NAND_BUSWIDTH_16)
> -		stm32_fmc2_nfc_set_buswidth_16(nfc, true);
> +	stm32_fmc2_nfc_setup(chip);
>  
>  	return 0;
>  }
> @@ -1952,11 +1958,6 @@ static int stm32_fmc2_nfc_probe(struct platform_device *pdev)
>  	chip->options |= NAND_BUSWIDTH_AUTO | NAND_NO_SUBPAGE_WRITE |
>  			 NAND_USES_DMA;
>  
> -	/* Default ECC settings */
> -	chip->ecc.engine_type = NAND_ECC_ENGINE_TYPE_ON_HOST;
> -	chip->ecc.size = FMC2_ECC_STEP_SIZE;
> -	chip->ecc.strength = FMC2_ECC_BCH8;
> -
>  	/* Scan to find existence of the device */
>  	ret = nand_scan(chip, nand->ncs);
>  	if (ret)

This overall looks very good to me, thanks for this update!

Cheers,
Miquèl

  reply	other threads:[~2020-10-30 13:37 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-30 13:33 [PATCH v2] mtd: rawnand: stm32_fmc2: fix broken ECC Christophe Kerello
2020-10-30 13:33 ` Christophe Kerello
2020-10-30 13:36 ` Miquel Raynal [this message]
2020-10-30 13:36   ` Miquel Raynal
2020-10-30 17:26 ` Miquel Raynal
2020-10-30 17:26   ` Miquel Raynal

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