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From: Shawn Guo <shawnguo@kernel.org>
To: Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
Cc: devicetree@vger.kernel.org, Xiaowei Bao <xiaowei.bao@nxp.com>,
	linux-kernel@vger.kernel.org, leoyang.li@nxp.com,
	robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv9] arm64: dts: layerscape: Add PCIe EP node for ls1088a
Date: Sun, 1 Nov 2020 16:54:47 +0800	[thread overview]
Message-ID: <20201101085447.GJ31601@dragon> (raw)
In-Reply-To: <20201026042759.15155-1-Zhiqiang.Hou@nxp.com>

On Mon, Oct 26, 2020 at 12:27:59PM +0800, Zhiqiang Hou wrote:
> From: Xiaowei Bao <xiaowei.bao@nxp.com>
> 
> Add PCIe EP node for ls1088a to support EP mode.
> 
> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> ---
> V9:
>  - Rebase the patch since V8 patch was not accepted due to conflict.
>  - Correct the number of outbound windows.
>  - Add lables for EP nodes.
> 
>  .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++++++++++++++++++
>  1 file changed, 31 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index ff5805206a28..8d8e610acba6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -517,6 +517,17 @@
>  			status = "disabled";
>  		};
>  
> +		pcie_ep1: pcie-ep@3400000 {
> +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";

Missing space in between compatibles.

Shawn

> +			reg = <0x00 0x03400000 0x0 0x00100000
> +			       0x20 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <24>;
> +			num-ob-windows = <256>;
> +			max-functions = /bits/ 8 <2>;
> +			status = "disabled";
> +		};
> +
>  		pcie2: pcie@3500000 {
>  			compatible = "fsl,ls1088a-pcie";
>  			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
> @@ -543,6 +554,16 @@
>  			status = "disabled";
>  		};
>  
> +		pcie_ep2: pcie-ep@3500000 {
> +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> +			reg = <0x00 0x03500000 0x0 0x00100000
> +			       0x28 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <6>;
> +			num-ob-windows = <6>;
> +			status = "disabled";
> +		};
> +
>  		pcie3: pcie@3600000 {
>  			compatible = "fsl,ls1088a-pcie";
>  			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
> @@ -569,6 +590,16 @@
>  			status = "disabled";
>  		};
>  
> +		pcie_ep3: pcie-ep@3600000 {
> +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> +			reg = <0x00 0x03600000 0x0 0x00100000
> +			       0x30 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <6>;
> +			num-ob-windows = <6>;
> +			status = "disabled";
> +		};
> +
>  		smmu: iommu@5000000 {
>  			compatible = "arm,mmu-500";
>  			reg = <0 0x5000000 0 0x800000>;
> -- 
> 2.17.1
> 

_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Zhiqiang Hou <Zhiqiang.Hou@nxp.com>
Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, robh+dt@kernel.org,
	leoyang.li@nxp.com, Xiaowei Bao <xiaowei.bao@nxp.com>
Subject: Re: [PATCHv9] arm64: dts: layerscape: Add PCIe EP node for ls1088a
Date: Sun, 1 Nov 2020 16:54:47 +0800	[thread overview]
Message-ID: <20201101085447.GJ31601@dragon> (raw)
In-Reply-To: <20201026042759.15155-1-Zhiqiang.Hou@nxp.com>

On Mon, Oct 26, 2020 at 12:27:59PM +0800, Zhiqiang Hou wrote:
> From: Xiaowei Bao <xiaowei.bao@nxp.com>
> 
> Add PCIe EP node for ls1088a to support EP mode.
> 
> Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> Reviewed-by: Andrew Murray <andrew.murray@arm.com>
> ---
> V9:
>  - Rebase the patch since V8 patch was not accepted due to conflict.
>  - Correct the number of outbound windows.
>  - Add lables for EP nodes.
> 
>  .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 31 +++++++++++++++++++
>  1 file changed, 31 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> index ff5805206a28..8d8e610acba6 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
> @@ -517,6 +517,17 @@
>  			status = "disabled";
>  		};
>  
> +		pcie_ep1: pcie-ep@3400000 {
> +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";

Missing space in between compatibles.

Shawn

> +			reg = <0x00 0x03400000 0x0 0x00100000
> +			       0x20 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <24>;
> +			num-ob-windows = <256>;
> +			max-functions = /bits/ 8 <2>;
> +			status = "disabled";
> +		};
> +
>  		pcie2: pcie@3500000 {
>  			compatible = "fsl,ls1088a-pcie";
>  			reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
> @@ -543,6 +554,16 @@
>  			status = "disabled";
>  		};
>  
> +		pcie_ep2: pcie-ep@3500000 {
> +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> +			reg = <0x00 0x03500000 0x0 0x00100000
> +			       0x28 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <6>;
> +			num-ob-windows = <6>;
> +			status = "disabled";
> +		};
> +
>  		pcie3: pcie@3600000 {
>  			compatible = "fsl,ls1088a-pcie";
>  			reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
> @@ -569,6 +590,16 @@
>  			status = "disabled";
>  		};
>  
> +		pcie_ep3: pcie-ep@3600000 {
> +			compatible = "fsl,ls1088a-pcie-ep","fsl,ls-pcie-ep";
> +			reg = <0x00 0x03600000 0x0 0x00100000
> +			       0x30 0x00000000 0x8 0x00000000>;
> +			reg-names = "regs", "addr_space";
> +			num-ib-windows = <6>;
> +			num-ob-windows = <6>;
> +			status = "disabled";
> +		};
> +
>  		smmu: iommu@5000000 {
>  			compatible = "arm,mmu-500";
>  			reg = <0 0x5000000 0 0x800000>;
> -- 
> 2.17.1
> 

  reply	other threads:[~2020-11-01  8:56 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-26  4:27 [PATCHv9] arm64: dts: layerscape: Add PCIe EP node for ls1088a Zhiqiang Hou
2020-10-26  4:27 ` Zhiqiang Hou
2020-11-01  8:54 ` Shawn Guo [this message]
2020-11-01  8:54   ` Shawn Guo
2020-11-02  3:59   ` Z.q. Hou
2020-11-02  3:59     ` Z.q. Hou

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