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From: Wolfram Sang <wsa@kernel.org>
To: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	linux-i2c@vger.kernel.org, peter@korsgaard.com, andrew@lunn.ch,
	paul.walmsley@sifive.com, palmer@dabbelt.com,
	aou@eecs.berkeley.edu
Subject: Re: [PATCH v4 1/1] i2c: ocores: fix polling mode workaround on FU540-C000 SoC
Date: Tue, 3 Nov 2020 22:11:26 +0100	[thread overview]
Message-ID: <20201103211126.GF1583@kunai> (raw)
In-Reply-To: <1603291814-240377-2-git-send-email-sagar.kadam@sifive.com>

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On Wed, Oct 21, 2020 at 07:50:14AM -0700, Sagar Shrikant Kadam wrote:
> The FU540-C000 has a broken IRQ and support was added earlier
> so that it will operate in polling mode, but seems to work only
> in case interrupts property is missing from the i2c0 dt-node.
> This should not be the case and the driver should handle polling
> mode with the interrupt property present in i2c0 node of the
> device tree.
> So check if it's the FU540-C000 soc and enable polling mode master
> xfers, as the IRQ for this chip is broken.
> 
> Fixes commit c45d4ba86731 ("i2c: ocores: add polling mode workaround
> for Sifive FU540-C000 SoC")
> 
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>

Applied to for-next, thanks!


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WARNING: multiple messages have this Message-ID (diff)
From: Wolfram Sang <wsa@kernel.org>
To: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Cc: andrew@lunn.ch, peter@korsgaard.com, aou@eecs.berkeley.edu,
	linux-kernel@vger.kernel.org, palmer@dabbelt.com,
	linux-i2c@vger.kernel.org, paul.walmsley@sifive.com,
	linux-riscv@lists.infradead.org
Subject: Re: [PATCH v4 1/1] i2c: ocores: fix polling mode workaround on FU540-C000 SoC
Date: Tue, 3 Nov 2020 22:11:26 +0100	[thread overview]
Message-ID: <20201103211126.GF1583@kunai> (raw)
In-Reply-To: <1603291814-240377-2-git-send-email-sagar.kadam@sifive.com>


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On Wed, Oct 21, 2020 at 07:50:14AM -0700, Sagar Shrikant Kadam wrote:
> The FU540-C000 has a broken IRQ and support was added earlier
> so that it will operate in polling mode, but seems to work only
> in case interrupts property is missing from the i2c0 dt-node.
> This should not be the case and the driver should handle polling
> mode with the interrupt property present in i2c0 node of the
> device tree.
> So check if it's the FU540-C000 soc and enable polling mode master
> xfers, as the IRQ for this chip is broken.
> 
> Fixes commit c45d4ba86731 ("i2c: ocores: add polling mode workaround
> for Sifive FU540-C000 SoC")
> 
> Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>

Applied to for-next, thanks!


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  parent reply	other threads:[~2020-11-03 21:16 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-21 14:50 [PATCH v4 0/1] fix i2c polling mode workaround for FU540-C000 SoC Sagar Shrikant Kadam
2020-10-21 14:50 ` Sagar Shrikant Kadam
2020-10-21 14:50 ` [PATCH v4 1/1] i2c: ocores: fix polling mode workaround on " Sagar Shrikant Kadam
2020-10-21 14:50   ` Sagar Shrikant Kadam
2020-10-21 15:46   ` Peter Korsgaard
2020-10-21 15:46     ` Peter Korsgaard
2020-10-23 11:55     ` Sagar Kadam
2020-10-23 11:55       ` Sagar Kadam
2020-11-03 21:11   ` Wolfram Sang [this message]
2020-11-03 21:11     ` Wolfram Sang

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