From: Adam Ford <aford173@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: devicetree@vger.kernel.org, Fabio Estevam <festevam@gmail.com>,
Adam Ford <aford173@gmail.com>,
Sascha Hauer <s.hauer@pengutronix.de>,
aford@beaconembedded.com, linux-kernel@vger.kernel.org,
Rob Herring <robh+dt@kernel.org>,
NXP Linux Team <linux-imx@nxp.com>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Shawn Guo <shawnguo@kernel.org>
Subject: [PATCH V3 2/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
Date: Fri, 6 Nov 2020 05:15:40 -0600 [thread overview]
Message-ID: <20201106111543.1806809-2-aford173@gmail.com> (raw)
In-Reply-To: <20201106111543.1806809-1-aford173@gmail.com>
The driver exists for the Enhanced Asynchronous Sample Rate Converter
(EASRC) Controller, but there isn't a device tree entry for it.
On the vendor kernel, they put this on a spba-bus for SDMA support.
Add the node for the spba-bus with the easrc node inside.
Signed-off-by: Adam Ford <aford173@gmail.com>
---
V3: Change spba-bus@30000000 to spba: bus@30000000
V2: Make the DT node more in-line with the dt binding and remove
vendor customizations that are not applicable.
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index a06d2a6268e6..61560c083300 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -253,6 +253,34 @@ aips1: bus@30000000 {
#size-cells = <1>;
ranges;
+ spba: bus@30000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30000000 0x100000>;
+ ranges;
+
+ easrc: easrc@300c0000 {
+ compatible = "fsl,imx8mn-easrc";
+ reg = <0x300c0000 0x10000>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
+ clock-names = "mem";
+ dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
+ <&sdma2 18 23 0> , <&sdma2 19 23 0>,
+ <&sdma2 20 23 0> , <&sdma2 21 23 0>,
+ <&sdma2 22 23 0> , <&sdma2 23 23 0>;
+ dma-names = "ctx0_rx", "ctx0_tx",
+ "ctx1_rx", "ctx1_tx",
+ "ctx2_rx", "ctx2_tx",
+ "ctx3_rx", "ctx3_tx";
+ firmware-name = "imx/easrc/easrc-imx8mn.bin";
+ fsl,asrc-rate = <8000>;
+ fsl,asrc-format = <2>;
+ status = "disabled";
+ };
+ };
+
gpio1: gpio@30200000 {
compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
reg = <0x30200000 0x10000>;
--
2.25.1
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WARNING: multiple messages have this Message-ID (diff)
From: Adam Ford <aford173@gmail.com>
To: linux-arm-kernel@lists.infradead.org
Cc: aford@beaconembedded.com, Adam Ford <aford173@gmail.com>,
Rob Herring <robh+dt@kernel.org>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Pengutronix Kernel Team <kernel@pengutronix.de>,
Fabio Estevam <festevam@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH V3 2/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter
Date: Fri, 6 Nov 2020 05:15:40 -0600 [thread overview]
Message-ID: <20201106111543.1806809-2-aford173@gmail.com> (raw)
In-Reply-To: <20201106111543.1806809-1-aford173@gmail.com>
The driver exists for the Enhanced Asynchronous Sample Rate Converter
(EASRC) Controller, but there isn't a device tree entry for it.
On the vendor kernel, they put this on a spba-bus for SDMA support.
Add the node for the spba-bus with the easrc node inside.
Signed-off-by: Adam Ford <aford173@gmail.com>
---
V3: Change spba-bus@30000000 to spba: bus@30000000
V2: Make the DT node more in-line with the dt binding and remove
vendor customizations that are not applicable.
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
index a06d2a6268e6..61560c083300 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
@@ -253,6 +253,34 @@ aips1: bus@30000000 {
#size-cells = <1>;
ranges;
+ spba: bus@30000000 {
+ compatible = "fsl,spba-bus", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x30000000 0x100000>;
+ ranges;
+
+ easrc: easrc@300c0000 {
+ compatible = "fsl,imx8mn-easrc";
+ reg = <0x300c0000 0x10000>;
+ interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk IMX8MN_CLK_ASRC_ROOT>;
+ clock-names = "mem";
+ dmas = <&sdma2 16 23 0> , <&sdma2 17 23 0>,
+ <&sdma2 18 23 0> , <&sdma2 19 23 0>,
+ <&sdma2 20 23 0> , <&sdma2 21 23 0>,
+ <&sdma2 22 23 0> , <&sdma2 23 23 0>;
+ dma-names = "ctx0_rx", "ctx0_tx",
+ "ctx1_rx", "ctx1_tx",
+ "ctx2_rx", "ctx2_tx",
+ "ctx3_rx", "ctx3_tx";
+ firmware-name = "imx/easrc/easrc-imx8mn.bin";
+ fsl,asrc-rate = <8000>;
+ fsl,asrc-format = <2>;
+ status = "disabled";
+ };
+ };
+
gpio1: gpio@30200000 {
compatible = "fsl,imx8mn-gpio", "fsl,imx35-gpio";
reg = <0x30200000 0x10000>;
--
2.25.1
next prev parent reply other threads:[~2020-11-06 11:16 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-06 11:15 [PATCH V3 1/5] dt-bindings: soc: imx: Add binding doc for spba bus Adam Ford
2020-11-06 11:15 ` Adam Ford
2020-11-06 11:15 ` Adam Ford [this message]
2020-11-06 11:15 ` [PATCH V3 2/5] arm64: dts: imx8mn: Enable Asynchronous Sample Rate Converter Adam Ford
2020-11-06 11:15 ` [PATCH V3 3/5] arm64: dts: imx8mn: Add SAI nodes Adam Ford
2020-11-06 11:15 ` Adam Ford
2020-11-06 11:15 ` [PATCH V3 4/5] arm64: dts: imx8mn: Add support for micfil Adam Ford
2020-11-06 11:15 ` Adam Ford
2020-11-06 11:15 ` [PATCH V3 5/5] arm64: dts: imx8mn: Add node for SPDIF Adam Ford
2020-11-06 11:15 ` Adam Ford
2020-11-06 16:18 ` [PATCH V3 1/5] dt-bindings: soc: imx: Add binding doc for spba bus Rob Herring
2020-11-06 16:18 ` Rob Herring
2020-11-06 16:19 ` Rob Herring
2020-11-06 16:19 ` Rob Herring
2020-11-06 16:28 ` Adam Ford
2020-11-06 16:28 ` Adam Ford
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