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From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Paweł Chmiel" <pawel.mikolaj.chmiel@gmail.com>
Cc: kgene@kernel.org, mturquette@baylibre.com, sboyd@kernel.org,
	s.nawrocki@samsung.com, tomasz.figa@gmail.com,
	cw00.choi@samsung.com, linux-samsung-soc@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2] clk: exynos7: Keep aclk_fsys1_200 enabled
Date: Sun, 8 Nov 2020 19:41:15 +0100	[thread overview]
Message-ID: <20201108184115.GA7078@kozik-lap> (raw)
In-Reply-To: <20201107121456.25562-1-pawel.mikolaj.chmiel@gmail.com>

On Sat, Nov 07, 2020 at 01:14:56PM +0100, Paweł Chmiel wrote:
> This clock must be always enabled to allow access to any registers in
> fsys1 CMU. Until proper solution based on runtime PM is applied
> (similar to what was done for Exynos5433), fix this by calling
> clk_prepare_enable() directly from clock provider driver.
> 
> It was observed on Samsung Galaxy S6 device (based on Exynos7420), where
> UFS module is probed before pmic used to power that device.
> In this case defer probe was happening and that clock was disabled by
> UFS driver, causing whole boot to hang on next CMU access.
> 
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
> ---
> Changes from v1:
>   - Instead of marking clock as critical, enable it manually in driver.
> ---
>  drivers/clk/samsung/clk-exynos7.c | 5 +++++
>  1 file changed, 5 insertions(+)

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzk@kernel.org>
To: "Paweł Chmiel" <pawel.mikolaj.chmiel@gmail.com>
Cc: linux-samsung-soc@vger.kernel.org, sboyd@kernel.org,
	mturquette@baylibre.com, tomasz.figa@gmail.com,
	linux-kernel@vger.kernel.org, cw00.choi@samsung.com,
	kgene@kernel.org, s.nawrocki@samsung.com,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2] clk: exynos7: Keep aclk_fsys1_200 enabled
Date: Sun, 8 Nov 2020 19:41:15 +0100	[thread overview]
Message-ID: <20201108184115.GA7078@kozik-lap> (raw)
In-Reply-To: <20201107121456.25562-1-pawel.mikolaj.chmiel@gmail.com>

On Sat, Nov 07, 2020 at 01:14:56PM +0100, Paweł Chmiel wrote:
> This clock must be always enabled to allow access to any registers in
> fsys1 CMU. Until proper solution based on runtime PM is applied
> (similar to what was done for Exynos5433), fix this by calling
> clk_prepare_enable() directly from clock provider driver.
> 
> It was observed on Samsung Galaxy S6 device (based on Exynos7420), where
> UFS module is probed before pmic used to power that device.
> In this case defer probe was happening and that clock was disabled by
> UFS driver, causing whole boot to hang on next CMU access.
> 
> Signed-off-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
> ---
> Changes from v1:
>   - Instead of marking clock as critical, enable it manually in driver.
> ---
>  drivers/clk/samsung/clk-exynos7.c | 5 +++++
>  1 file changed, 5 insertions(+)

Acked-by: Krzysztof Kozlowski <krzk@kernel.org>

Best regards,
Krzysztof

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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-11-08 18:41 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-07 12:14 [PATCH v2] clk: exynos7: Keep aclk_fsys1_200 enabled Paweł Chmiel
2020-11-07 12:14 ` Paweł Chmiel
2020-11-08 18:41 ` Krzysztof Kozlowski [this message]
2020-11-08 18:41   ` Krzysztof Kozlowski
2020-11-09 12:32 ` Sylwester Nawrocki
2020-11-09 12:32   ` Sylwester Nawrocki
2020-11-09 12:43   ` Sylwester Nawrocki
2020-11-09 12:43     ` Sylwester Nawrocki
2020-11-09 16:35   ` Paweł Chmiel
2020-11-09 16:35     ` Paweł Chmiel

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