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From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: "Jonathan Hunter" <jonathanh@nvidia.com>,
	"Alan Stern" <stern@rowland.harvard.edu>,
	"Peter Chen" <Peter.Chen@nxp.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	"Lee Jones" <lee.jones@linaro.org>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Rob Herring" <robh+dt@kernel.org>,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	"Peter Geis" <pgwipeout@gmail.com>,
	"Nicolas Chauvet" <kwizart@gmail.com>,
	linux-samsung-soc@vger.kernel.org, devel@driverdev.osuosl.org,
	linux-usb@vger.kernel.org, linux-pwm@vger.kernel.org,
	linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org,
	devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org,
	linux-media@vger.kernel.org, linux-tegra@vger.kernel.org
Subject: Re: [PATCH v1 07/30] soc/tegra: Add sync state API
Date: Tue, 10 Nov 2020 21:47:27 +0100	[thread overview]
Message-ID: <20201110204727.GG2375022@ulmo> (raw)
In-Reply-To: <20201104234427.26477-8-digetx@gmail.com>

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On Thu, Nov 05, 2020 at 02:44:04AM +0300, Dmitry Osipenko wrote:
> Introduce sync state API that will be used by Tegra device drivers. This
> new API is primarily needed for syncing state of SoC devices that are left
> ON after bootloader or permanently enabled. All these devices belong to a
> shared CORE voltage domain, and thus, we needed to bring all the devices
> into expected state before the voltage scaling could be performed.
> 
> All drivers of DVFS-critical devices shall sync theirs the state before
> Tegra's voltage regulator coupler will be allowed to perform a system-wide
> voltage scaling.
> 
> Tested-by: Peter Geis <pgwipeout@gmail.com>
> Tested-by: Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  drivers/soc/tegra/common.c | 152 ++++++++++++++++++++++++++++++++++++-
>  include/soc/tegra/common.h |  22 ++++++
>  2 files changed, 170 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/soc/tegra/common.c b/drivers/soc/tegra/common.c
> index 3dc54f59cafe..f9b2b6f57887 100644
> --- a/drivers/soc/tegra/common.c
> +++ b/drivers/soc/tegra/common.c
> @@ -3,13 +3,52 @@
>   * Copyright (C) 2014 NVIDIA CORPORATION.  All rights reserved.
>   */
>  
> +#define dev_fmt(fmt)	"%s: " fmt, __func__
> +#define pr_fmt(fmt)	"%s: " fmt, __func__
> +
> +#include <linux/export.h>
> +#include <linux/init.h>
> +#include <linux/mutex.h>
>  #include <linux/of.h>
> +#include <linux/of_device.h>
>  
>  #include <soc/tegra/common.h>
>  
> +#define terga_soc_for_each_device(__dev) \

tegra_soc_for_each_device

> +	for ((__dev) = tegra_soc_devices; (__dev) && (__dev)->compatible; \
> +	     (__dev)++)
> +
> +struct tegra_soc_device {
> +	const char *compatible;
> +	const bool dvfs_critical;
> +	unsigned int sync_count;
> +};
> +
> +static DEFINE_MUTEX(tegra_soc_lock);
> +static struct tegra_soc_device *tegra_soc_devices;
> +
> +/*
> + * DVFS-critical devices are either active at a boot time or permanently
> + * active, like EMC for example.  System-wide DVFS should be deferred until
> + * drivers of the critical devices synced theirs state.
> + */
> +
> +static struct tegra_soc_device tegra20_soc_devices[] = {
> +	{ .compatible = "nvidia,tegra20-dc", .dvfs_critical = true, },
> +	{ .compatible = "nvidia,tegra20-emc", .dvfs_critical = true, },
> +	{ }
> +};
> +
> +static struct tegra_soc_device tegra30_soc_devices[] = {
> +	{ .compatible = "nvidia,tegra30-dc", .dvfs_critical = true, },
> +	{ .compatible = "nvidia,tegra30-emc", .dvfs_critical = true, },
> +	{ .compatible = "nvidia,tegra30-pwm", .dvfs_critical = true, },
> +	{ }
> +};
> +
>  static const struct of_device_id tegra_machine_match[] = {
> -	{ .compatible = "nvidia,tegra20", },
> -	{ .compatible = "nvidia,tegra30", },
> +	{ .compatible = "nvidia,tegra20", .data = tegra20_soc_devices, },
> +	{ .compatible = "nvidia,tegra30", .data = tegra30_soc_devices, },
>  	{ .compatible = "nvidia,tegra114", },
>  	{ .compatible = "nvidia,tegra124", },
>  	{ .compatible = "nvidia,tegra132", },
> @@ -17,7 +56,7 @@ static const struct of_device_id tegra_machine_match[] = {
>  	{ }
>  };
>  
> -bool soc_is_tegra(void)
> +static const struct of_device_id *tegra_soc_of_match(void)
>  {
>  	const struct of_device_id *match;
>  	struct device_node *root;
> @@ -29,5 +68,110 @@ bool soc_is_tegra(void)
>  	match = of_match_node(tegra_machine_match, root);
>  	of_node_put(root);
>  
> -	return match != NULL;
> +	return match;
> +}
> +
> +bool soc_is_tegra(void)
> +{
> +	return tegra_soc_of_match() != NULL;
> +}
> +
> +void tegra_soc_device_sync_state(struct device *dev)
> +{
> +	struct tegra_soc_device *soc_dev;
> +
> +	mutex_lock(&tegra_soc_lock);
> +	terga_soc_for_each_device(soc_dev) {

tegra_soc_for_each_device

> +		if (!of_device_is_compatible(dev->of_node, soc_dev->compatible))
> +			continue;
> +
> +		if (!soc_dev->sync_count) {
> +			dev_err(dev, "already synced\n");
> +			break;
> +		}
> +
> +		/*
> +		 * All DVFS-capable devices should have the CORE regulator
> +		 * phandle.  Older device-trees don't have it, hence state
> +		 * won't be synced for the older DTBs, allowing them to work
> +		 * properly.
> +		 */
> +		if (soc_dev->dvfs_critical &&
> +		    !device_property_present(dev, "core-supply")) {
> +			dev_dbg(dev, "doesn't have core supply\n");
> +			break;
> +		}
> +
> +		soc_dev->sync_count--;
> +		dev_dbg(dev, "sync_count=%u\n", soc_dev->sync_count);
> +		break;
> +	}
> +	mutex_unlock(&tegra_soc_lock);
> +}
> +EXPORT_SYMBOL_GPL(tegra_soc_device_sync_state);
> +
> +bool tegra_soc_dvfs_state_synced(void)
> +{
> +	struct tegra_soc_device *soc_dev;
> +	bool synced_state = true;
> +
> +	/*
> +	 * CORE voltage scaling is limited until drivers of the critical
> +	 * devices synced theirs state.
> +	 */
> +	mutex_lock(&tegra_soc_lock);
> +	terga_soc_for_each_device(soc_dev) {

tegra_soc_for_each_device

I wonder if you copy/pasted this or if you got really lucky to mistype
this all three times.

> +		if (!soc_dev->sync_count || !soc_dev->dvfs_critical)
> +			continue;
> +
> +		pr_debug_ratelimited("%s: sync_count=%u\n",
> +				     soc_dev->compatible, soc_dev->sync_count);
> +
> +		synced_state = false;
> +		break;
> +	}
> +	mutex_unlock(&tegra_soc_lock);
> +
> +	return synced_state;
> +}
> +
> +static int __init tegra_soc_devices_init(void)
> +{
> +	struct device_node *np, *prev_np = NULL;
> +	struct tegra_soc_device *soc_dev;
> +	const struct of_device_id *match;
> +
> +	if (!soc_is_tegra())
> +		return 0;
> +
> +	match = tegra_soc_of_match();
> +	tegra_soc_devices = (void *)match->data;
> +
> +	/*
> +	 * If device node is disabled in a device-tree, then we shouldn't
> +	 * care about this device. Even if device is active during boot,
> +	 * its clock will be disabled by CCF as unused.
> +	 */
> +	terga_soc_for_each_device(soc_dev) {
> +		do {
> +			/*
> +			 * Devices like display controller have multiple
> +			 * instances with the same compatible. Hence we need
> +			 * to walk up the whole tree in order to account those
> +			 * multiple instances.
> +			 */
> +			np = of_find_compatible_node(prev_np, NULL,
> +						     soc_dev->compatible);
> +			of_node_put(prev_np);
> +			prev_np = np;
> +
> +			if (of_device_is_available(np)) {
> +				pr_debug("added %s\n", soc_dev->compatible);
> +				soc_dev->sync_count++;
> +			}
> +		} while (np);

Maybe use for_each_compatible_node() for that inside loop?

> +	}
> +
> +	return 0;
>  }
> +postcore_initcall_sync(tegra_soc_devices_init);

This is unfortunate. I recall having this discussion multiple times and
one idea that has been floating around for a while was to let a driver
bind against the top-level "bus" node. That has the advantage that it
both anchors the code somewhere, so we don't have to play this game of
checking for the SoC with soc_is_tegra(), and it properly orders this
with respect to the child devices, so we wouldn't have to make this a
postcore_initcall.

Might be worth looking at that again, but for now this seems okay.

Thierry

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WARNING: multiple messages have this Message-ID (diff)
From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: "Peter Chen" <Peter.Chen@nxp.com>,
	"Ulf Hansson" <ulf.hansson@linaro.org>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	dri-devel@lists.freedesktop.org,
	"Adrian Hunter" <adrian.hunter@intel.com>,
	devicetree@vger.kernel.org, "Lee Jones" <lee.jones@linaro.org>,
	"Marek Szyprowski" <m.szyprowski@samsung.com>,
	devel@driverdev.osuosl.org, linux-samsung-soc@vger.kernel.org,
	"Nicolas Chauvet" <kwizart@gmail.com>,
	"Krzysztof Kozlowski" <krzk@kernel.org>,
	"Jonathan Hunter" <jonathanh@nvidia.com>,
	"Alan Stern" <stern@rowland.harvard.edu>,
	"Uwe Kleine-König" <u.kleine-koenig@pengutronix.de>,
	linux-media@vger.kernel.org, linux-pwm@vger.kernel.org,
	"Rob Herring" <robh+dt@kernel.org>,
	linux-tegra@vger.kernel.org,
	"Mauro Carvalho Chehab" <mchehab@kernel.org>,
	"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
	linux-usb@vger.kernel.org, linux-mmc@vger.kernel.org,
	linux-kernel@vger.kernel.org, "Mark Brown" <broonie@kernel.org>,
	"Peter Geis" <pgwipeout@gmail.com>
Subject: Re: [PATCH v1 07/30] soc/tegra: Add sync state API
Date: Tue, 10 Nov 2020 21:47:27 +0100	[thread overview]
Message-ID: <20201110204727.GG2375022@ulmo> (raw)
In-Reply-To: <20201104234427.26477-8-digetx@gmail.com>


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On Thu, Nov 05, 2020 at 02:44:04AM +0300, Dmitry Osipenko wrote:
> Introduce sync state API that will be used by Tegra device drivers. This
> new API is primarily needed for syncing state of SoC devices that are left
> ON after bootloader or permanently enabled. All these devices belong to a
> shared CORE voltage domain, and thus, we needed to bring all the devices
> into expected state before the voltage scaling could be performed.
> 
> All drivers of DVFS-critical devices shall sync theirs the state before
> Tegra's voltage regulator coupler will be allowed to perform a system-wide
> voltage scaling.
> 
> Tested-by: Peter Geis <pgwipeout@gmail.com>
> Tested-by: Nicolas Chauvet <kwizart@gmail.com>
> Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
> ---
>  drivers/soc/tegra/common.c | 152 ++++++++++++++++++++++++++++++++++++-
>  include/soc/tegra/common.h |  22 ++++++
>  2 files changed, 170 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/soc/tegra/common.c b/drivers/soc/tegra/common.c
> index 3dc54f59cafe..f9b2b6f57887 100644
> --- a/drivers/soc/tegra/common.c
> +++ b/drivers/soc/tegra/common.c
> @@ -3,13 +3,52 @@
>   * Copyright (C) 2014 NVIDIA CORPORATION.  All rights reserved.
>   */
>  
> +#define dev_fmt(fmt)	"%s: " fmt, __func__
> +#define pr_fmt(fmt)	"%s: " fmt, __func__
> +
> +#include <linux/export.h>
> +#include <linux/init.h>
> +#include <linux/mutex.h>
>  #include <linux/of.h>
> +#include <linux/of_device.h>
>  
>  #include <soc/tegra/common.h>
>  
> +#define terga_soc_for_each_device(__dev) \

tegra_soc_for_each_device

> +	for ((__dev) = tegra_soc_devices; (__dev) && (__dev)->compatible; \
> +	     (__dev)++)
> +
> +struct tegra_soc_device {
> +	const char *compatible;
> +	const bool dvfs_critical;
> +	unsigned int sync_count;
> +};
> +
> +static DEFINE_MUTEX(tegra_soc_lock);
> +static struct tegra_soc_device *tegra_soc_devices;
> +
> +/*
> + * DVFS-critical devices are either active at a boot time or permanently
> + * active, like EMC for example.  System-wide DVFS should be deferred until
> + * drivers of the critical devices synced theirs state.
> + */
> +
> +static struct tegra_soc_device tegra20_soc_devices[] = {
> +	{ .compatible = "nvidia,tegra20-dc", .dvfs_critical = true, },
> +	{ .compatible = "nvidia,tegra20-emc", .dvfs_critical = true, },
> +	{ }
> +};
> +
> +static struct tegra_soc_device tegra30_soc_devices[] = {
> +	{ .compatible = "nvidia,tegra30-dc", .dvfs_critical = true, },
> +	{ .compatible = "nvidia,tegra30-emc", .dvfs_critical = true, },
> +	{ .compatible = "nvidia,tegra30-pwm", .dvfs_critical = true, },
> +	{ }
> +};
> +
>  static const struct of_device_id tegra_machine_match[] = {
> -	{ .compatible = "nvidia,tegra20", },
> -	{ .compatible = "nvidia,tegra30", },
> +	{ .compatible = "nvidia,tegra20", .data = tegra20_soc_devices, },
> +	{ .compatible = "nvidia,tegra30", .data = tegra30_soc_devices, },
>  	{ .compatible = "nvidia,tegra114", },
>  	{ .compatible = "nvidia,tegra124", },
>  	{ .compatible = "nvidia,tegra132", },
> @@ -17,7 +56,7 @@ static const struct of_device_id tegra_machine_match[] = {
>  	{ }
>  };
>  
> -bool soc_is_tegra(void)
> +static const struct of_device_id *tegra_soc_of_match(void)
>  {
>  	const struct of_device_id *match;
>  	struct device_node *root;
> @@ -29,5 +68,110 @@ bool soc_is_tegra(void)
>  	match = of_match_node(tegra_machine_match, root);
>  	of_node_put(root);
>  
> -	return match != NULL;
> +	return match;
> +}
> +
> +bool soc_is_tegra(void)
> +{
> +	return tegra_soc_of_match() != NULL;
> +}
> +
> +void tegra_soc_device_sync_state(struct device *dev)
> +{
> +	struct tegra_soc_device *soc_dev;
> +
> +	mutex_lock(&tegra_soc_lock);
> +	terga_soc_for_each_device(soc_dev) {

tegra_soc_for_each_device

> +		if (!of_device_is_compatible(dev->of_node, soc_dev->compatible))
> +			continue;
> +
> +		if (!soc_dev->sync_count) {
> +			dev_err(dev, "already synced\n");
> +			break;
> +		}
> +
> +		/*
> +		 * All DVFS-capable devices should have the CORE regulator
> +		 * phandle.  Older device-trees don't have it, hence state
> +		 * won't be synced for the older DTBs, allowing them to work
> +		 * properly.
> +		 */
> +		if (soc_dev->dvfs_critical &&
> +		    !device_property_present(dev, "core-supply")) {
> +			dev_dbg(dev, "doesn't have core supply\n");
> +			break;
> +		}
> +
> +		soc_dev->sync_count--;
> +		dev_dbg(dev, "sync_count=%u\n", soc_dev->sync_count);
> +		break;
> +	}
> +	mutex_unlock(&tegra_soc_lock);
> +}
> +EXPORT_SYMBOL_GPL(tegra_soc_device_sync_state);
> +
> +bool tegra_soc_dvfs_state_synced(void)
> +{
> +	struct tegra_soc_device *soc_dev;
> +	bool synced_state = true;
> +
> +	/*
> +	 * CORE voltage scaling is limited until drivers of the critical
> +	 * devices synced theirs state.
> +	 */
> +	mutex_lock(&tegra_soc_lock);
> +	terga_soc_for_each_device(soc_dev) {

tegra_soc_for_each_device

I wonder if you copy/pasted this or if you got really lucky to mistype
this all three times.

> +		if (!soc_dev->sync_count || !soc_dev->dvfs_critical)
> +			continue;
> +
> +		pr_debug_ratelimited("%s: sync_count=%u\n",
> +				     soc_dev->compatible, soc_dev->sync_count);
> +
> +		synced_state = false;
> +		break;
> +	}
> +	mutex_unlock(&tegra_soc_lock);
> +
> +	return synced_state;
> +}
> +
> +static int __init tegra_soc_devices_init(void)
> +{
> +	struct device_node *np, *prev_np = NULL;
> +	struct tegra_soc_device *soc_dev;
> +	const struct of_device_id *match;
> +
> +	if (!soc_is_tegra())
> +		return 0;
> +
> +	match = tegra_soc_of_match();
> +	tegra_soc_devices = (void *)match->data;
> +
> +	/*
> +	 * If device node is disabled in a device-tree, then we shouldn't
> +	 * care about this device. Even if device is active during boot,
> +	 * its clock will be disabled by CCF as unused.
> +	 */
> +	terga_soc_for_each_device(soc_dev) {
> +		do {
> +			/*
> +			 * Devices like display controller have multiple
> +			 * instances with the same compatible. Hence we need
> +			 * to walk up the whole tree in order to account those
> +			 * multiple instances.
> +			 */
> +			np = of_find_compatible_node(prev_np, NULL,
> +						     soc_dev->compatible);
> +			of_node_put(prev_np);
> +			prev_np = np;
> +
> +			if (of_device_is_available(np)) {
> +				pr_debug("added %s\n", soc_dev->compatible);
> +				soc_dev->sync_count++;
> +			}
> +		} while (np);

Maybe use for_each_compatible_node() for that inside loop?

> +	}
> +
> +	return 0;
>  }
> +postcore_initcall_sync(tegra_soc_devices_init);

This is unfortunate. I recall having this discussion multiple times and
one idea that has been floating around for a while was to let a driver
bind against the top-level "bus" node. That has the advantage that it
both anchors the code somewhere, so we don't have to play this game of
checking for the SoC with soc_is_tegra(), and it properly orders this
with respect to the child devices, so we wouldn't have to make this a
postcore_initcall.

Might be worth looking at that again, but for now this seems okay.

Thierry

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  reply	other threads:[~2020-11-10 20:47 UTC|newest]

Thread overview: 216+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-04 23:43 [PATCH v1 00/30] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Dmitry Osipenko
2020-11-04 23:43 ` Dmitry Osipenko
2020-11-04 23:43 ` [PATCH v1 01/30] dt-bindings: host1x: Document OPP and voltage regulator properties Dmitry Osipenko
2020-11-04 23:43   ` Dmitry Osipenko
2020-11-09 18:57   ` Rob Herring
2020-11-09 18:57     ` Rob Herring
2020-11-11 11:45   ` Ulf Hansson
2020-11-11 11:45     ` Ulf Hansson
2020-11-04 23:43 ` [PATCH v1 02/30] dt-bindings: mmc: tegra: " Dmitry Osipenko
2020-11-04 23:43   ` Dmitry Osipenko
2020-11-09 18:58   ` Rob Herring
2020-11-09 18:58     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 03/30] dt-bindings: pwm: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-09 19:00   ` Rob Herring
2020-11-09 19:00     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 04/30] media: dt: bindings: tegra-vde: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-09 19:01   ` Rob Herring
2020-11-09 19:01     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 05/30] dt-binding: usb: ci-hdrc-usb2: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-09 19:01   ` Rob Herring
2020-11-09 19:01     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 06/30] dt-bindings: usb: tegra-ehci: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-09 19:01   ` Rob Herring
2020-11-09 19:01     ` Rob Herring
2020-11-04 23:44 ` [PATCH v1 07/30] soc/tegra: Add sync state API Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-10 20:47   ` Thierry Reding [this message]
2020-11-10 20:47     ` Thierry Reding
2020-11-10 21:22     ` Dmitry Osipenko
2020-11-10 21:22       ` Dmitry Osipenko
2020-11-10 21:32       ` Dmitry Osipenko
2020-11-10 21:32         ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 08/30] soc/tegra: regulators: Support Tegra SoC device " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 09/30] soc/tegra: regulators: Fix lockup when voltage-spread is out of range Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 10/30] regulator: Allow skipping disabled regulators in regulator_check_consumers() Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 11/30] drm/tegra: dc: Support OPP and SoC core voltage scaling Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-10 20:29   ` Thierry Reding
2020-11-10 20:29     ` Thierry Reding
2020-11-10 20:32     ` Mark Brown
2020-11-10 20:32       ` Mark Brown
2020-11-10 21:23       ` Dmitry Osipenko
2020-11-10 21:23         ` Dmitry Osipenko
2020-11-11 11:55         ` Mark Brown
2020-11-11 11:55           ` Mark Brown
2020-11-12 16:59           ` Dmitry Osipenko
2020-11-12 16:59             ` Dmitry Osipenko
2020-11-12 17:16             ` Mark Brown
2020-11-12 17:16               ` Mark Brown
2020-11-12 19:16               ` Dmitry Osipenko
2020-11-12 19:16                 ` Dmitry Osipenko
2020-11-12 20:01                 ` Mark Brown
2020-11-12 20:01                   ` Mark Brown
2020-11-12 22:37                   ` Dmitry Osipenko
2020-11-12 22:37                     ` Dmitry Osipenko
2020-11-13 14:29                     ` Mark Brown
2020-11-13 14:29                       ` Mark Brown
2020-11-13 15:55                       ` Dmitry Osipenko
2020-11-13 15:55                         ` Dmitry Osipenko
2020-11-13 16:15                         ` Mark Brown
2020-11-13 16:15                           ` Mark Brown
2020-11-13 17:13                           ` Dmitry Osipenko
2020-11-13 17:13                             ` Dmitry Osipenko
2020-11-13 17:28                             ` Mark Brown
2020-11-13 17:28                               ` Mark Brown
2020-11-15 17:42                               ` Dmitry Osipenko
2020-11-15 17:42                                 ` Dmitry Osipenko
2020-11-16 13:33                                 ` Mark Brown
2020-11-16 13:33                                   ` Mark Brown
2020-11-19 14:22                                   ` Dmitry Osipenko
2020-11-19 14:22                                     ` Dmitry Osipenko
2020-11-19 15:19                                     ` Mark Brown
2020-11-19 15:19                                       ` Mark Brown
2020-11-13 17:30                             ` Thierry Reding
2020-11-13 17:30                               ` Thierry Reding
2020-11-10 21:17     ` Dmitry Osipenko
2020-11-10 21:17       ` Dmitry Osipenko
2020-11-10 21:50     ` Dmitry Osipenko
2020-11-10 21:50       ` Dmitry Osipenko
2020-11-11  9:28     ` Dan Carpenter
2020-11-11  9:28       ` Dan Carpenter
2020-11-04 23:44 ` [PATCH v1 12/30] drm/tegra: gr2d: Correct swapped device-tree compatibles Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 13/30] drm/tegra: gr2d: Support OPP and SoC core voltage scaling Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 14/30] drm/tegra: gr3d: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 15/30] drm/tegra: hdmi: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 16/30] gpu: host1x: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 17/30] mmc: sdhci-tegra: Support OPP and " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-05  9:58   ` Viresh Kumar
2020-11-05  9:58     ` Viresh Kumar
2020-11-05 14:18     ` Dmitry Osipenko
2020-11-05 14:18       ` Dmitry Osipenko
2020-11-06  6:15       ` Viresh Kumar
2020-11-06  6:15         ` Viresh Kumar
2020-11-06 13:17         ` Dmitry Osipenko
2020-11-06 13:41           ` Frank Lee
2020-11-09  5:00             ` Viresh Kumar
2020-11-09  5:00               ` Viresh Kumar
2020-11-09  5:08               ` Dmitry Osipenko
2020-11-09  5:08                 ` Dmitry Osipenko
2020-11-09  5:10                 ` Viresh Kumar
2020-11-09  5:10                   ` Viresh Kumar
2020-11-09  5:19                   ` Dmitry Osipenko
2020-11-09  5:19                     ` Dmitry Osipenko
2020-11-09  5:35                     ` Viresh Kumar
2020-11-09  5:35                       ` Viresh Kumar
2020-11-09  5:44                       ` Dmitry Osipenko
2020-11-09  5:44                         ` Dmitry Osipenko
2020-11-09  5:53                         ` Viresh Kumar
2020-11-09  5:53                           ` Viresh Kumar
2020-11-09 11:20                           ` Frank Lee
2020-11-09 11:20                             ` Frank Lee
2020-12-22  8:54                             ` Viresh Kumar
2020-12-22  8:54                               ` Viresh Kumar
2020-11-04 23:44 ` [PATCH v1 18/30] pwm: tegra: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-10 20:50   ` Thierry Reding
2020-11-10 20:50     ` Thierry Reding
2020-11-10 21:17     ` Dmitry Osipenko
2020-11-10 21:17       ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 19/30] media: staging: tegra-vde: Support OPP and SoC " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 20/30] usb: chipidea: tegra: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 21/30] usb: host: ehci-tegra: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-05 16:07   ` Alan Stern
2020-11-05 16:07     ` Alan Stern
2020-11-05 17:54     ` Dmitry Osipenko
2020-11-05 17:54       ` Dmitry Osipenko
2020-11-05 18:02     ` Dmitry Osipenko
2020-11-05 18:02       ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 22/30] memory: tegra20-emc: Support Tegra SoC device state syncing Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 23/30] memory: tegra30-emc: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 24/30] ARM: tegra: Add OPP tables for Tegra20 peripheral devices Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 25/30] ARM: tegra: Add OPP tables for Tegra30 " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 26/30] ARM: tegra: ventana: Add voltage supplies to DVFS-capable devices Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 27/30] ARM: tegra: paz00: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 28/30] ARM: tegra: acer-a500: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 29/30] ARM: tegra: cardhu-a04: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-04 23:44 ` [PATCH v1 30/30] ARM: tegra: nexus7: " Dmitry Osipenko
2020-11-04 23:44   ` Dmitry Osipenko
2020-11-05  1:45 ` [PATCH v1 00/30] Introduce core voltage scaling for NVIDIA Tegra20/30 SoCs Michał Mirosław
2020-11-05  1:45   ` Michał Mirosław
2020-11-05 13:57   ` Dmitry Osipenko
2020-11-05 13:57     ` Dmitry Osipenko
2020-11-05  9:45 ` Ulf Hansson
2020-11-05  9:45   ` Ulf Hansson
2020-11-05 10:06   ` Viresh Kumar
2020-11-05 10:06     ` Viresh Kumar
2020-11-05 10:34     ` Ulf Hansson
2020-11-05 10:34       ` Ulf Hansson
2020-11-05 10:40       ` Viresh Kumar
2020-11-05 10:40         ` Viresh Kumar
2020-11-05 10:56         ` Ulf Hansson
2020-11-05 10:56           ` Ulf Hansson
2020-11-05 11:13           ` Viresh Kumar
2020-11-05 11:13             ` Viresh Kumar
2020-11-05 12:52             ` Ulf Hansson
2020-11-05 12:52               ` Ulf Hansson
2020-11-05 15:22   ` Dmitry Osipenko
2020-11-05 15:22     ` Dmitry Osipenko
2020-11-08 12:19     ` Dmitry Osipenko
2020-11-08 12:19       ` Dmitry Osipenko
2020-11-09  4:43       ` Viresh Kumar
2020-11-09  4:43         ` Viresh Kumar
2020-11-09  4:47         ` Dmitry Osipenko
2020-11-09  4:47           ` Dmitry Osipenko
2020-11-09  5:10           ` Dmitry Osipenko
2020-11-09  5:10             ` Dmitry Osipenko
2020-11-09  5:12             ` Viresh Kumar
2020-11-09  5:12               ` Viresh Kumar
2020-11-11 11:38       ` Ulf Hansson
2020-11-11 11:38         ` Ulf Hansson
2020-11-12 19:57         ` Dmitry Osipenko
2020-11-12 19:57           ` Dmitry Osipenko
2020-11-12 20:43           ` Thierry Reding
2020-11-12 20:43             ` Thierry Reding
2020-11-12 22:14             ` Dmitry Osipenko
2020-11-12 22:14               ` Dmitry Osipenko
2020-11-13 14:45               ` Ulf Hansson
2020-11-13 14:45                 ` Ulf Hansson
2020-11-13 16:00                 ` Dmitry Osipenko
2020-11-13 16:00                   ` Dmitry Osipenko
2020-11-13 16:35               ` Thierry Reding
2020-11-13 16:35                 ` Thierry Reding
2020-11-15 16:29                 ` Dmitry Osipenko
2020-11-15 16:29                   ` Dmitry Osipenko
2020-12-01 13:57 ` Mark Brown
2020-12-01 13:57   ` Mark Brown
2020-12-01 14:17   ` Dmitry Osipenko
2020-12-01 14:17     ` Dmitry Osipenko
2020-12-01 14:34     ` Mark Brown
2020-12-01 14:34       ` Mark Brown
2020-12-01 14:44       ` Dmitry Osipenko
2020-12-01 14:44         ` Dmitry Osipenko

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