From: Catalin Marinas <catalin.marinas@arm.com>
To: Ionela Voinescu <ionela.voinescu@arm.com>
Cc: mark.rutland@arm.com, linux-kernel@vger.kernel.org,
sudeep.holla@arm.com, will@kernel.org, morten.rasmussen@arm.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v4 3/3] arm64: implement CPPC FFH support using AMUs
Date: Thu, 12 Nov 2020 18:00:46 +0000 [thread overview]
Message-ID: <20201112180045.GO29613@gaia> (raw)
In-Reply-To: <20201106125334.21570-4-ionela.voinescu@arm.com>
On Fri, Nov 06, 2020 at 12:53:34PM +0000, Ionela Voinescu wrote:
> +static inline
> +int counters_read_on_cpu(int cpu, smp_call_func_t func, u64 *val)
> +{
> + if (!cpu_has_amu_feat(cpu))
> + return -EOPNOTSUPP;
> +
> + smp_call_function_single(cpu, func, val, 1);
> +
> + return 0;
> +}
I got lost in the cpufreq call chains. Can this function ever be called
with interrupts disabled?
--
Catalin
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WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Ionela Voinescu <ionela.voinescu@arm.com>
Cc: mark.rutland@arm.com, sudeep.holla@arm.com, will@kernel.org,
morten.rasmussen@arm.com, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 3/3] arm64: implement CPPC FFH support using AMUs
Date: Thu, 12 Nov 2020 18:00:46 +0000 [thread overview]
Message-ID: <20201112180045.GO29613@gaia> (raw)
In-Reply-To: <20201106125334.21570-4-ionela.voinescu@arm.com>
On Fri, Nov 06, 2020 at 12:53:34PM +0000, Ionela Voinescu wrote:
> +static inline
> +int counters_read_on_cpu(int cpu, smp_call_func_t func, u64 *val)
> +{
> + if (!cpu_has_amu_feat(cpu))
> + return -EOPNOTSUPP;
> +
> + smp_call_function_single(cpu, func, val, 1);
> +
> + return 0;
> +}
I got lost in the cpufreq call chains. Can this function ever be called
with interrupts disabled?
--
Catalin
next prev parent reply other threads:[~2020-11-12 18:01 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-06 12:53 [PATCH v4 0/3] arm64: cppc: add FFH support using AMUs Ionela Voinescu
2020-11-06 12:53 ` Ionela Voinescu
2020-11-06 12:53 ` [PATCH v4 1/3] arm64: wrap and generalise counter read functions Ionela Voinescu
2020-11-06 12:53 ` Ionela Voinescu
2020-11-13 14:11 ` Sudeep Holla
2020-11-13 14:11 ` Sudeep Holla
2020-11-06 12:53 ` [PATCH v4 2/3] arm64: split counter validation function Ionela Voinescu
2020-11-06 12:53 ` Ionela Voinescu
2020-11-13 14:12 ` Sudeep Holla
2020-11-13 14:12 ` Sudeep Holla
2020-11-06 12:53 ` [PATCH v4 3/3] arm64: implement CPPC FFH support using AMUs Ionela Voinescu
2020-11-06 12:53 ` Ionela Voinescu
2020-11-12 18:00 ` Catalin Marinas [this message]
2020-11-12 18:00 ` Catalin Marinas
2020-11-13 12:28 ` Ionela Voinescu
2020-11-13 12:28 ` Ionela Voinescu
2020-11-13 12:54 ` Catalin Marinas
2020-11-13 12:54 ` Catalin Marinas
2020-11-13 14:16 ` Sudeep Holla
2020-11-13 14:16 ` Sudeep Holla
2020-11-13 16:37 ` Ionela Voinescu
2020-11-13 16:37 ` Ionela Voinescu
2020-11-13 20:03 ` Catalin Marinas
2020-11-13 20:03 ` Catalin Marinas
2020-11-13 15:53 ` [PATCH] arm64: abort counter_read_on_cpu() when irqs_disabled() Ionela Voinescu
2020-11-13 15:53 ` Ionela Voinescu
2020-11-13 16:02 ` Mark Rutland
2020-11-13 16:02 ` Mark Rutland
2020-11-13 16:58 ` Ionela Voinescu
2020-11-13 16:58 ` Ionela Voinescu
2020-11-13 17:30 ` Mark Rutland
2020-11-13 17:30 ` Mark Rutland
2020-11-13 19:55 ` Catalin Marinas
2020-11-13 19:55 ` Catalin Marinas
2020-11-13 20:26 ` [PATCH v4 0/3] arm64: cppc: add FFH support using AMUs Catalin Marinas
2020-11-13 20:26 ` Catalin Marinas
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