* [PATCH 1/8] clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks
2020-11-19 13:12 [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
@ 2020-11-19 13:12 ` Tony Lindgren
2020-12-09 2:19 ` Stephen Boyd
2020-11-19 13:12 ` [PATCH 2/8] soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances Tony Lindgren
` (7 subsequent siblings)
8 siblings, 1 reply; 11+ messages in thread
From: Tony Lindgren @ 2020-11-19 13:12 UTC (permalink / raw)
To: linux-omap
Cc: Benoît Cousson, devicetree, linux-clk, Michael Turquette,
Stephen Boyd, Suman Anna, Tero Kristo, Roger Quadros,
Santosh Shilimkar
Similar to what we've done for IPU and DSP let's ignore the status bit
for the IVA clkctrl register.
The clkctrl status won't change unless the related rstctrl is deasserted,
and the rstctrl status won't change unless the clkctrl is enabled.
Cc: linux-clk@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Suman Anna <s-anna@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/clk/ti/clk-7xx.c | 7 +++++++
include/dt-bindings/clock/dra7.h | 4 ++++
2 files changed, 11 insertions(+)
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -252,6 +252,12 @@ static const struct omap_clkctrl_reg_data dra7_l3instr_clkctrl_regs[] __initcons
{ 0 },
};
+static const struct omap_clkctrl_reg_data dra7_iva_clkctrl_regs[] __initconst = {
+ { DRA7_IVA_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_NO_IDLEST, "dpll_iva_h12x2_ck" },
+ { DRA7_SL2IF_CLKCTRL, NULL, CLKF_HW_SUP, "dpll_iva_h12x2_ck" },
+ { 0 },
+};
+
static const char * const dra7_dss_dss_clk_parents[] __initconst = {
"dpll_per_h12x2_ck",
NULL,
@@ -827,6 +833,7 @@ const struct omap_clkctrl_data dra7_clkctrl_data[] __initconst = {
{ 0x4a008c00, dra7_atl_clkctrl_regs },
{ 0x4a008d20, dra7_l4cfg_clkctrl_regs },
{ 0x4a008e20, dra7_l3instr_clkctrl_regs },
+ { 0x4a008f20, dra7_iva_clkctrl_regs },
{ 0x4a009020, dra7_cam_clkctrl_regs },
{ 0x4a009120, dra7_dss_clkctrl_regs },
{ 0x4a009220, dra7_gpu_clkctrl_regs },
diff --git a/include/dt-bindings/clock/dra7.h b/include/dt-bindings/clock/dra7.h
--- a/include/dt-bindings/clock/dra7.h
+++ b/include/dt-bindings/clock/dra7.h
@@ -84,6 +84,10 @@
#define DRA7_L3_MAIN_2_CLKCTRL DRA7_CLKCTRL_INDEX(0x20)
#define DRA7_L3_INSTR_CLKCTRL DRA7_CLKCTRL_INDEX(0x28)
+/* iva clocks */
+#define DRA7_IVA_CLKCTRL DRA7_CLKCTRL_INDEX(0x20)
+#define DRA7_SL2IF_CLKCTRL DRA7_CLKCTRL_INDEX(0x28)
+
/* dss clocks */
#define DRA7_DSS_CORE_CLKCTRL DRA7_CLKCTRL_INDEX(0x20)
#define DRA7_BB2D_CLKCTRL DRA7_CLKCTRL_INDEX(0x30)
--
2.29.2
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 1/8] clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks
2020-11-19 13:12 ` [PATCH 1/8] clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks Tony Lindgren
@ 2020-12-09 2:19 ` Stephen Boyd
0 siblings, 0 replies; 11+ messages in thread
From: Stephen Boyd @ 2020-12-09 2:19 UTC (permalink / raw)
To: Tony Lindgren, linux-omap
Cc: Benoît Cousson, devicetree, linux-clk, Michael Turquette,
Suman Anna, Tero Kristo, Roger Quadros, Santosh Shilimkar
Quoting Tony Lindgren (2020-11-19 05:12:52)
> Similar to what we've done for IPU and DSP let's ignore the status bit
> for the IVA clkctrl register.
>
> The clkctrl status won't change unless the related rstctrl is deasserted,
> and the rstctrl status won't change unless the clkctrl is enabled.
>
> Cc: linux-clk@vger.kernel.org
> Cc: Michael Turquette <mturquette@baylibre.com>
> Cc: Stephen Boyd <sboyd@kernel.org>
> Cc: Suman Anna <s-anna@ti.com>
> Cc: Tero Kristo <t-kristo@ti.com>
> Signed-off-by: Tony Lindgren <tony@atomide.com>
> ---
Acked-by: Stephen Boyd <sboyd@kernel.org>
^ permalink raw reply [flat|nested] 11+ messages in thread
* [PATCH 2/8] soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances
2020-11-19 13:12 [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
2020-11-19 13:12 ` [PATCH 1/8] clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks Tony Lindgren
@ 2020-11-19 13:12 ` Tony Lindgren
2020-11-19 13:12 ` [PATCH 3/8] ARM: dts: dra7: add " Tony Lindgren
` (6 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2020-11-19 13:12 UTC (permalink / raw)
To: linux-omap
Cc: Benoît Cousson, devicetree, Tero Kristo, Santosh Shilimkar,
Michael Turquette, Roger Quadros, Stephen Boyd, Suman Anna,
linux-clk
From: Tero Kristo <t-kristo@ti.com>
Add genpd support for mpu, dsp, ipu, coreaon, core, iva, cam, dss, gpu,
l3init, l4per, custefuse, wkupaon, emu, eve, rtc and vpe instances.
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/soc/ti/omap_prm.c | 106 ++++++++++++++++++++++++++++++++++----
1 file changed, 97 insertions(+), 9 deletions(-)
diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c
--- a/drivers/soc/ti/omap_prm.c
+++ b/drivers/soc/ti/omap_prm.c
@@ -234,15 +234,103 @@ static const struct omap_prm_data omap5_prm_data[] = {
};
static const struct omap_prm_data dra7_prm_data[] = {
- { .name = "dsp1", .base = 0x4ae06400, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 },
- { .name = "ipu", .base = 0x4ae06500, .rstctrl = 0x10, .rstst = 0x14, .clkdm_name = "ipu1", .rstmap = rst_map_012 },
- { .name = "core", .base = 0x4ae06700, .rstctrl = 0x210, .rstst = 0x214, .clkdm_name = "ipu2", .rstmap = rst_map_012 },
- { .name = "iva", .base = 0x4ae06f00, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012 },
- { .name = "dsp2", .base = 0x4ae07b00, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 },
- { .name = "eve1", .base = 0x4ae07b40, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 },
- { .name = "eve2", .base = 0x4ae07b80, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 },
- { .name = "eve3", .base = 0x4ae07bc0, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 },
- { .name = "eve4", .base = 0x4ae07c00, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 },
+ {
+ .name = "mpu", .base = 0x4ae06300,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_reton,
+ },
+ {
+ .name = "dsp1", .base = 0x4ae06400,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01,
+ },
+ {
+ .name = "ipu", .base = 0x4ae06500,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012,
+ .clkdm_name = "ipu1"
+ },
+ {
+ .name = "coreaon", .base = 0x4ae06628,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_alwon,
+ },
+ {
+ .name = "core", .base = 0x4ae06700,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_alwon,
+ .rstctrl = 0x210, .rstst = 0x214, .rstmap = rst_map_012,
+ .clkdm_name = "ipu2"
+ },
+ {
+ .name = "iva", .base = 0x4ae06f00,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012,
+ },
+ {
+ .name = "cam", .base = 0x4ae07000,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ },
+ {
+ .name = "dss", .base = 0x4ae07100,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ },
+ {
+ .name = "gpu", .base = 0x4ae07200,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ },
+ {
+ .name = "l3init", .base = 0x4ae07300,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_alwon,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012,
+ .clkdm_name = "pcie"
+ },
+ {
+ .name = "l4per", .base = 0x4ae07400,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_alwon,
+ },
+ {
+ .name = "custefuse", .base = 0x4ae07600,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ },
+ {
+ .name = "wkupaon", .base = 0x4ae07724,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_alwon,
+ },
+ {
+ .name = "emu", .base = 0x4ae07900,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ },
+ {
+ .name = "dsp2", .base = 0x4ae07b00,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01
+ },
+ {
+ .name = "eve1", .base = 0x4ae07b40,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01
+ },
+ {
+ .name = "eve2", .base = 0x4ae07b80,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01
+ },
+ {
+ .name = "eve3", .base = 0x4ae07bc0,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01
+ },
+ {
+ .name = "eve4", .base = 0x4ae07c00,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01
+ },
+ {
+ .name = "rtc", .base = 0x4ae07c60,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_alwon,
+ },
+ {
+ .name = "vpe", .base = 0x4ae07c80,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto,
+ },
{ },
};
--
2.29.2
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 3/8] ARM: dts: dra7: add remaining PRM instances
2020-11-19 13:12 [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
2020-11-19 13:12 ` [PATCH 1/8] clk: ti: dra7: Drop idlest polling from IVA clkctrl clocks Tony Lindgren
2020-11-19 13:12 ` [PATCH 2/8] soc: ti: omap-prm: dra7: add genpd support for remaining PRM instances Tony Lindgren
@ 2020-11-19 13:12 ` Tony Lindgren
2020-11-19 13:12 ` [PATCH 4/8] ARM: dts: Configure interconnect target module for dra7 iva Tony Lindgren
` (5 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2020-11-19 13:12 UTC (permalink / raw)
To: linux-omap
Cc: Benoît Cousson, devicetree, Tero Kristo, Michael Turquette,
Roger Quadros, Santosh Shilimkar, Stephen Boyd, Suman Anna,
linux-clk
From: Tero Kristo <t-kristo@ti.com>
Add remaining PRM instances for the dra7 SoC. Additionally enable the
genpd support for them.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/dra7.dtsi | 76 +++++++++++++++++++++++++++++++++++++
1 file changed, 76 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1031,53 +1031,129 @@ &iva_crit {
#include "dra7xx-clocks.dtsi"
&prm {
+ prm_mpu: prm@300 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x300 0x100>;
+ #power-domain-cells = <0>;
+ };
+
prm_dsp1: prm@400 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x400 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_ipu: prm@500 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x500 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_coreaon: prm@628 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x628 0xd8>;
+ #power-domain-cells = <0>;
};
prm_core: prm@700 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x700 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_iva: prm@f00 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0xf00 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_cam: prm@1000 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1000 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_dss: prm@1100 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1100 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_gpu: prm@1200 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1200 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_l3init: prm@1300 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1300 0x100>;
+ #reset-cells = <1>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_l4per: prm@1400 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1400 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_custefuse: prm@1600 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1600 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_wkupaon: prm@1724 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1724 0x100>;
+ #power-domain-cells = <0>;
};
prm_dsp2: prm@1b00 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1b00 0x40>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_eve1: prm@1b40 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1b40 0x40>;
+ #power-domain-cells = <0>;
};
prm_eve2: prm@1b80 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1b80 0x40>;
+ #power-domain-cells = <0>;
};
prm_eve3: prm@1bc0 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1bc0 0x40>;
+ #power-domain-cells = <0>;
};
prm_eve4: prm@1c00 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0x1c00 0x60>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_rtc: prm@1c60 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1c60 0x20>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_vpe: prm@1c80 {
+ compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1c80 0x80>;
+ #power-domain-cells = <0>;
};
};
--
2.29.2
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 4/8] ARM: dts: Configure interconnect target module for dra7 iva
2020-11-19 13:12 [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
` (2 preceding siblings ...)
2020-11-19 13:12 ` [PATCH 3/8] ARM: dts: dra7: add " Tony Lindgren
@ 2020-11-19 13:12 ` Tony Lindgren
2020-11-19 13:12 ` [PATCH 5/8] ARM: OMAP2+: Drop legacy platform data for dra7 gpmc Tony Lindgren
` (4 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2020-11-19 13:12 UTC (permalink / raw)
To: linux-omap
Cc: Benoît Cousson, devicetree, Suman Anna, Michael Turquette,
Roger Quadros, Santosh Shilimkar, Stephen Boyd, Tero Kristo,
linux-clk
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.
Cc: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/dra7.dtsi | 27 +++++++++++++++++++++++++++
arch/arm/boot/dts/dra7xx-clocks.dtsi | 14 ++++++++++++++
2 files changed, 41 insertions(+)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -962,6 +962,32 @@ sham: sham@0 {
};
};
+ iva_hd_target: target-module@5a000000 {
+ compatible = "ti,sysc-omap4", "ti,sysc";
+ reg = <0x5a05a400 0x4>,
+ <0x5a05a410 0x4>;
+ reg-names = "rev", "sysc";
+ ti,sysc-midle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ power-domains = <&prm_iva>;
+ resets = <&prm_iva 2>;
+ reset-names = "rstctrl";
+ clocks = <&iva_clkctrl DRA7_IVA_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x5a000000 0x5a000000 0x1000000>,
+ <0x5b000000 0x5b000000 0x1000000>;
+
+ iva {
+ compatible = "ti,ivahd";
+ };
+ };
+
opp_supply_mpu: opp-supply@4a003b20 {
compatible = "ti,omap5-opp-supply";
reg = <0x4a003b20 0xc>;
@@ -1067,6 +1093,7 @@ prm_core: prm@700 {
prm_iva: prm@f00 {
compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst";
reg = <0xf00 0x100>;
+ #reset-cells = <1>;
#power-domain-cells = <0>;
};
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -1726,6 +1726,20 @@ l3instr_clkctrl: l3instr-clkctrl@20 {
};
};
+ iva_cm: iva-cm@f00 {
+ compatible = "ti,omap4-cm";
+ reg = <0xf00 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xf00 0x100>;
+
+ iva_clkctrl: iva-clkctrl@20 {
+ compatible = "ti,clkctrl";
+ reg = <0x20 0xc>;
+ #clock-cells = <2>;
+ };
+ };
+
cam_cm: cam-cm@1000 {
compatible = "ti,omap4-cm";
reg = <0x1000 0x100>;
--
2.29.2
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 5/8] ARM: OMAP2+: Drop legacy platform data for dra7 gpmc
2020-11-19 13:12 [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
` (3 preceding siblings ...)
2020-11-19 13:12 ` [PATCH 4/8] ARM: dts: Configure interconnect target module for dra7 iva Tony Lindgren
@ 2020-11-19 13:12 ` Tony Lindgren
2020-11-19 13:12 ` [PATCH 6/8] soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances Tony Lindgren
` (3 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2020-11-19 13:12 UTC (permalink / raw)
To: linux-omap
Cc: Benoît Cousson, devicetree, Roger Quadros, Michael Turquette,
Santosh Shilimkar, Stephen Boyd, Suman Anna, Tero Kristo,
linux-clk
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.
Cc: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/dra7.dtsi | 48 +++++++++++++++-------
arch/arm/mach-omap2/omap_hwmod_7xx_data.c | 49 -----------------------
2 files changed, 33 insertions(+), 64 deletions(-)
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -724,22 +724,40 @@ sata: sata@4a141100 {
/* OCP2SCP1 */
/* IRQ for DWC3_3 and DWC3_4 need IRQ crossbar */
- gpmc: gpmc@50000000 {
- compatible = "ti,am3352-gpmc";
- ti,hwmods = "gpmc";
- reg = <0x50000000 0x37c>; /* device IO registers */
- interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
- dmas = <&edma_xbar 4 0>;
- dma-names = "rxtx";
- gpmc,num-cs = <8>;
- gpmc,num-waitpins = <2>;
- #address-cells = <2>;
+
+ target-module@50000000 {
+ compatible = "ti,sysc-omap2", "ti,sysc";
+ reg = <0x50000000 4>,
+ <0x50000010 4>,
+ <0x50000014 4>;
+ reg-names = "rev", "sysc", "syss";
+ ti,sysc-sidle = <SYSC_IDLE_FORCE>,
+ <SYSC_IDLE_NO>,
+ <SYSC_IDLE_SMART>;
+ ti,syss-mask = <1>;
+ clocks = <&l3main1_clkctrl DRA7_L3MAIN1_GPMC_CLKCTRL 0>;
+ clock-names = "fck";
+ #address-cells = <1>;
#size-cells = <1>;
- interrupt-controller;
- #interrupt-cells = <2>;
- gpio-controller;
- #gpio-cells = <2>;
- status = "disabled";
+ ranges = <0x50000000 0x50000000 0x00001000>, /* regs */
+ <0x00000000 0x00000000 0x40000000>; /* data */
+
+ gpmc: gpmc@50000000 {
+ compatible = "ti,am3352-gpmc";
+ reg = <0x50000000 0x37c>; /* device IO registers */
+ interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
+ dmas = <&edma_xbar 4 0>;
+ dma-names = "rxtx";
+ gpmc,num-cs = <8>;
+ gpmc,num-waitpins = <2>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ status = "disabled";
+ };
};
target-module@56000000 {
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -242,46 +242,6 @@ static struct omap_hwmod dra7xx_ctrl_module_wkup_hwmod = {
},
};
-/*
- * 'gpmc' class
- *
- */
-
-static struct omap_hwmod_class_sysconfig dra7xx_gpmc_sysc = {
- .rev_offs = 0x0000,
- .sysc_offs = 0x0010,
- .syss_offs = 0x0014,
- .sysc_flags = (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
- SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
- .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
- .sysc_fields = &omap_hwmod_sysc_type1,
-};
-
-static struct omap_hwmod_class dra7xx_gpmc_hwmod_class = {
- .name = "gpmc",
- .sysc = &dra7xx_gpmc_sysc,
-};
-
-/* gpmc */
-
-static struct omap_hwmod dra7xx_gpmc_hwmod = {
- .name = "gpmc",
- .class = &dra7xx_gpmc_hwmod_class,
- .clkdm_name = "l3main1_clkdm",
- /* Skip reset for CONFIG_OMAP_GPMC_DEBUG for bootloader timings */
- .flags = DEBUG_OMAP_GPMC_HWMOD_FLAGS,
- .main_clk = "l3_iclk_div",
- .prcm = {
- .omap4 = {
- .clkctrl_offs = DRA7XX_CM_L3MAIN1_GPMC_CLKCTRL_OFFSET,
- .context_offs = DRA7XX_RM_L3MAIN1_GPMC_CONTEXT_OFFSET,
- .modulemode = MODULEMODE_HWCTRL,
- },
- },
-};
-
-
-
/*
* 'mpu' class
*
@@ -611,14 +571,6 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__ctrl_module_wkup = {
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
-/* l3_main_1 -> gpmc */
-static struct omap_hwmod_ocp_if dra7xx_l3_main_1__gpmc = {
- .master = &dra7xx_l3_main_1_hwmod,
- .slave = &dra7xx_gpmc_hwmod,
- .clk = "l3_iclk_div",
- .user = OCP_USER_MPU | OCP_USER_SDMA,
-};
-
/* l4_cfg -> mpu */
static struct omap_hwmod_ocp_if dra7xx_l4_cfg__mpu = {
.master = &dra7xx_l4_cfg_hwmod,
@@ -722,7 +674,6 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
&dra7xx_l4_per2__atl,
&dra7xx_l3_main_1__bb2d,
&dra7xx_l4_wkup__ctrl_module_wkup,
- &dra7xx_l3_main_1__gpmc,
&dra7xx_l4_cfg__mpu,
&dra7xx_l3_main_1__pciess1,
&dra7xx_l4_cfg__pciess1,
--
2.29.2
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 6/8] soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances
2020-11-19 13:12 [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
` (4 preceding siblings ...)
2020-11-19 13:12 ` [PATCH 5/8] ARM: OMAP2+: Drop legacy platform data for dra7 gpmc Tony Lindgren
@ 2020-11-19 13:12 ` Tony Lindgren
2020-11-19 13:12 ` [PATCH 7/8] ARM: dts: omap5: add " Tony Lindgren
` (2 subsequent siblings)
8 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2020-11-19 13:12 UTC (permalink / raw)
To: linux-omap
Cc: Benoît Cousson, devicetree, Tero Kristo, Santosh Shilimkar,
Michael Turquette, Roger Quadros, Stephen Boyd, Suman Anna,
linux-clk
From: Tero Kristo <t-kristo@ti.com>
Add genpd support for mpu, dsp, coreaon, core, iva, cam, dss, gpu,
l3init, custefuse, wkupaon and emu instances.
Cc: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
drivers/soc/ti/omap_prm.c | 61 ++++++++++++++++++++++++++++++++++++---
1 file changed, 57 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/ti/omap_prm.c b/drivers/soc/ti/omap_prm.c
--- a/drivers/soc/ti/omap_prm.c
+++ b/drivers/soc/ti/omap_prm.c
@@ -222,14 +222,67 @@ static const struct omap_prm_data omap4_prm_data[] = {
};
static const struct omap_prm_data omap5_prm_data[] = {
- { .name = "dsp", .base = 0x4ae06400, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01 },
+ {
+ .name = "mpu", .base = 0x4ae06300,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_reton,
+ },
+ {
+ .name = "dsp", .base = 0x4ae06400,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_noinact,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_01
+ },
{
.name = "abe", .base = 0x4ae06500,
.pwrstctrl = 0, .pwrstst = 0x4, .dmap = &omap_prm_nooff,
},
- { .name = "core", .base = 0x4ae06700, .rstctrl = 0x210, .rstst = 0x214, .clkdm_name = "ipu", .rstmap = rst_map_012 },
- { .name = "iva", .base = 0x4ae07200, .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012 },
- { .name = "device", .base = 0x4ae07c00, .rstctrl = 0x0, .rstst = 0x4, .rstmap = rst_map_01, .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM },
+ {
+ .name = "coreaon", .base = 0x4ae06600,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_alwon
+ },
+ {
+ .name = "core", .base = 0x4ae06700,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_reton,
+ .rstctrl = 0x210, .rstst = 0x214, .clkdm_name = "ipu",
+ .rstmap = rst_map_012
+ },
+ {
+ .name = "iva", .base = 0x4ae07200,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_noinact,
+ .rstctrl = 0x10, .rstst = 0x14, .rstmap = rst_map_012
+ },
+ {
+ .name = "cam", .base = 0x4ae07300,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto
+ },
+ {
+ .name = "dss", .base = 0x4ae07400,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_noinact
+ },
+ {
+ .name = "gpu", .base = 0x4ae07500,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto
+ },
+ {
+ .name = "l3init", .base = 0x4ae07600,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_reton
+ },
+ {
+ .name = "custefuse", .base = 0x4ae07700,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto
+ },
+ {
+ .name = "wkupaon", .base = 0x4ae07800,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_alwon
+ },
+ {
+ .name = "emu", .base = 0x4ae07a00,
+ .pwrstctrl = 0x0, .pwrstst = 0x4, .dmap = &omap_prm_onoff_noauto
+ },
+ {
+ .name = "device", .base = 0x4ae07c00,
+ .rstctrl = 0x0, .rstst = 0x4, .rstmap = rst_map_01,
+ .flags = OMAP_PRM_HAS_RSTCTRL | OMAP_PRM_HAS_NO_CLKDM
+ },
{ },
};
--
2.29.2
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 7/8] ARM: dts: omap5: add remaining PRM instances
2020-11-19 13:12 [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
` (5 preceding siblings ...)
2020-11-19 13:12 ` [PATCH 6/8] soc: ti: omap-prm: omap5: add genpd support for remaining PRM instances Tony Lindgren
@ 2020-11-19 13:12 ` Tony Lindgren
2020-11-19 13:12 ` [PATCH 8/8] ARM: dts: Configure power domain for omap5 dss Tony Lindgren
2020-11-19 13:20 ` [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
8 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2020-11-19 13:12 UTC (permalink / raw)
To: linux-omap
Cc: Benoît Cousson, devicetree, Tero Kristo, Michael Turquette,
Roger Quadros, Santosh Shilimkar, Stephen Boyd, Suman Anna,
linux-clk
From: Tero Kristo <t-kristo@ti.com>
Add remaining PRM instances for the omap5 SoC. Additionally enable the
genpd support for them.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/omap5.dtsi | 57 ++++++++++++++++++++++++++++++++++++
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -670,10 +670,17 @@ &core_thermal {
#include "omap54xx-clocks.dtsi"
&prm {
+ prm_mpu: prm@300 {
+ compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
+ reg = <0x300 0x100>;
+ #power-domain-cells = <0>;
+ };
+
prm_dsp: prm@400 {
compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
reg = <0x400 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_abe: prm@500 {
@@ -682,16 +689,66 @@ prm_abe: prm@500 {
#power-domain-cells = <0>;
};
+ prm_coreaon: prm@600 {
+ compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
+ reg = <0x600 0x100>;
+ #power-domain-cells = <0>;
+ };
+
prm_core: prm@700 {
compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
reg = <0x700 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
};
prm_iva: prm@1200 {
compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
reg = <0x1200 0x100>;
#reset-cells = <1>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_cam: prm@1300 {
+ compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1300 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_dss: prm@1400 {
+ compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1400 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_gpu: prm@1500 {
+ compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1500 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_l3init: prm@1600 {
+ compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1600 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_custefuse: prm@1700 {
+ compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1700 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_wkupaon: prm@1800 {
+ compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1800 0x100>;
+ #power-domain-cells = <0>;
+ };
+
+ prm_emu: prm@1a00 {
+ compatible = "ti,omap5-prm-inst", "ti,omap-prm-inst";
+ reg = <0x1a00 0x100>;
+ #power-domain-cells = <0>;
};
prm_device: prm@1c00 {
--
2.29.2
^ permalink raw reply [flat|nested] 11+ messages in thread* [PATCH 8/8] ARM: dts: Configure power domain for omap5 dss
2020-11-19 13:12 [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
` (6 preceding siblings ...)
2020-11-19 13:12 ` [PATCH 7/8] ARM: dts: omap5: add " Tony Lindgren
@ 2020-11-19 13:12 ` Tony Lindgren
2020-11-19 13:20 ` [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
8 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2020-11-19 13:12 UTC (permalink / raw)
To: linux-omap
Cc: Benoît Cousson, devicetree, Michael Turquette, Roger Quadros,
Santosh Shilimkar, Stephen Boyd, Suman Anna, Tero Kristo,
linux-clk
This allows shutting down dss domain when the screen blanks.
Signed-off-by: Tony Lindgren <tony@atomide.com>
---
arch/arm/boot/dts/omap5.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -410,6 +410,7 @@ target-module@58000000 {
<0x58000014 4>;
reg-names = "rev", "syss";
ti,syss-mask = <1>;
+ power-domains = <&prm_dss>;
clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 0>,
<&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 9>,
<&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>,
--
2.29.2
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [PATCH 0/8] Configure genpd domains for dra7 and omap5
2020-11-19 13:12 [PATCH 0/8] Configure genpd domains for dra7 and omap5 Tony Lindgren
` (7 preceding siblings ...)
2020-11-19 13:12 ` [PATCH 8/8] ARM: dts: Configure power domain for omap5 dss Tony Lindgren
@ 2020-11-19 13:20 ` Tony Lindgren
8 siblings, 0 replies; 11+ messages in thread
From: Tony Lindgren @ 2020-11-19 13:20 UTC (permalink / raw)
To: linux-omap
Cc: Benoît Cousson, devicetree, Michael Turquette, Roger Quadros,
Santosh Shilimkar, Stephen Boyd, Suman Anna, Tero Kristo,
linux-clk
* Tony Lindgren <tony@atomide.com> [201119 13:14]:
> Hi all,
>
> Here are patches to configure genpd domains for dra7 and omap5
> to get us a bit closer for switching to booting with genpd and
> simple-pm-bus.
These depend on the earlier patches:
PATCH 2/4] ARM: OMAP2+: Fix missing select PM_GENERIC_DOMAINS_OF
[PATCHv2 0/9] Genpd related code changes to drop am335x pdata
To make testing things easier, I've pushed out these changes also
to a temporary test branch at [0][1] below.
Regards,
Tony
[0] git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git omap-for-v5.11/tmp-testing-genpd
[1] https://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git/log/?h=omap-for-v5.11/tmp-testing-genp
^ permalink raw reply [flat|nested] 11+ messages in thread