All of lore.kernel.org
 help / color / mirror / Atom feed
From: Will Deacon <will@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: Yu Zhao <yuzhao@google.com>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	Peter Zijlstra <peterz@infradead.org>,
	kernel-team@android.com,
	Linus Torvalds <torvalds@linux-foundation.org>,
	linux-mm@kvack.org, Minchan Kim <minchan@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/6] tlb: Fix access and (soft-)dirty bit management
Date: Fri, 20 Nov 2020 14:35:51 +0000	[thread overview]
Message-ID: <20201120143557.6715-1-will@kernel.org> (raw)

Hi all,

This series attempts to fix some issues relating to our access and
(soft-)dirty bit management relating to TLB invalidation. It's a bit all
over the place because I kept running into new issues as I was trying to
figure it out.

The first patch fixes a crash we've seen in practice. The other patches
are all addressing things that I found by code inspection and I would
_really_ appreciate others having a look. In particular, what can go
wrong in practice if a CPU has a stale, writable entry in the TLB for a
pte which is !pte_write()? It feels intuitively bad, but I couldn't find
anywhere that would explode (the CoW path looks alright, for example).

Cheers,

Will

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Yu Zhao <yuzhao@google.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: linux-mm@kvack.org
Cc: linux-arm-kernel@lists.infradead.org

--->8

Will Deacon (6):
  arm64: pgtable: Fix pte_accessible()
  arm64: pgtable: Ensure dirty bit is preserved across pte_wrprotect()
  tlb: mmu_gather: Remove unused start/end arguments from
    tlb_finish_mmu()
  mm: proc: Invalidate TLB after clearing soft-dirty page state
  tlb: mmu_gather: Introduce tlb_gather_mmu_fullmm()
  mm: proc: Avoid fullmm flush for young/dirty bit toggling

 arch/arm64/include/asm/pgtable.h | 31 +++++++++++++++----------------
 arch/ia64/include/asm/tlb.h      |  2 +-
 arch/x86/kernel/ldt.c            |  2 +-
 fs/exec.c                        |  2 +-
 fs/proc/task_mmu.c               | 22 +++++++++++++---------
 include/asm-generic/tlb.h        |  6 ++++--
 include/linux/mm_types.h         |  4 ++--
 mm/hugetlb.c                     |  2 +-
 mm/madvise.c                     |  6 +++---
 mm/memory.c                      |  4 ++--
 mm/mmap.c                        |  6 +++---
 mm/mmu_gather.c                  | 21 +++++++++++++++------
 mm/oom_kill.c                    |  4 ++--
 13 files changed, 63 insertions(+), 49 deletions(-)

-- 
2.29.2.454.gaff20da3a2-goog


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Will Deacon <will@kernel.org>
To: linux-kernel@vger.kernel.org
Cc: kernel-team@android.com, Will Deacon <will@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Yu Zhao <yuzhao@google.com>, Minchan Kim <minchan@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Linus Torvalds <torvalds@linux-foundation.org>,
	Anshuman Khandual <anshuman.khandual@arm.com>,
	linux-mm@kvack.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH 0/6] tlb: Fix access and (soft-)dirty bit management
Date: Fri, 20 Nov 2020 14:35:51 +0000	[thread overview]
Message-ID: <20201120143557.6715-1-will@kernel.org> (raw)

Hi all,

This series attempts to fix some issues relating to our access and
(soft-)dirty bit management relating to TLB invalidation. It's a bit all
over the place because I kept running into new issues as I was trying to
figure it out.

The first patch fixes a crash we've seen in practice. The other patches
are all addressing things that I found by code inspection and I would
_really_ appreciate others having a look. In particular, what can go
wrong in practice if a CPU has a stale, writable entry in the TLB for a
pte which is !pte_write()? It feels intuitively bad, but I couldn't find
anywhere that would explode (the CoW path looks alright, for example).

Cheers,

Will

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Yu Zhao <yuzhao@google.com>
Cc: Minchan Kim <minchan@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: linux-mm@kvack.org
Cc: linux-arm-kernel@lists.infradead.org

--->8

Will Deacon (6):
  arm64: pgtable: Fix pte_accessible()
  arm64: pgtable: Ensure dirty bit is preserved across pte_wrprotect()
  tlb: mmu_gather: Remove unused start/end arguments from
    tlb_finish_mmu()
  mm: proc: Invalidate TLB after clearing soft-dirty page state
  tlb: mmu_gather: Introduce tlb_gather_mmu_fullmm()
  mm: proc: Avoid fullmm flush for young/dirty bit toggling

 arch/arm64/include/asm/pgtable.h | 31 +++++++++++++++----------------
 arch/ia64/include/asm/tlb.h      |  2 +-
 arch/x86/kernel/ldt.c            |  2 +-
 fs/exec.c                        |  2 +-
 fs/proc/task_mmu.c               | 22 +++++++++++++---------
 include/asm-generic/tlb.h        |  6 ++++--
 include/linux/mm_types.h         |  4 ++--
 mm/hugetlb.c                     |  2 +-
 mm/madvise.c                     |  6 +++---
 mm/memory.c                      |  4 ++--
 mm/mmap.c                        |  6 +++---
 mm/mmu_gather.c                  | 21 +++++++++++++++------
 mm/oom_kill.c                    |  4 ++--
 13 files changed, 63 insertions(+), 49 deletions(-)

-- 
2.29.2.454.gaff20da3a2-goog



             reply	other threads:[~2020-11-20 14:37 UTC|newest]

Thread overview: 85+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-20 14:35 Will Deacon [this message]
2020-11-20 14:35 ` [PATCH 0/6] tlb: Fix access and (soft-)dirty bit management Will Deacon
2020-11-20 14:35 ` [PATCH 1/6] arm64: pgtable: Fix pte_accessible() Will Deacon
2020-11-20 14:35   ` Will Deacon
2020-11-20 16:03   ` Minchan Kim
2020-11-20 16:03     ` Minchan Kim
2020-11-20 19:53   ` Yu Zhao
2020-11-20 19:53     ` Yu Zhao
2020-11-23 13:27   ` Catalin Marinas
2020-11-23 13:27     ` Catalin Marinas
2020-11-24 10:02   ` Anshuman Khandual
2020-11-24 10:02     ` Anshuman Khandual
2020-11-20 14:35 ` [PATCH 2/6] arm64: pgtable: Ensure dirty bit is preserved across pte_wrprotect() Will Deacon
2020-11-20 14:35   ` Will Deacon
2020-11-20 17:09   ` Minchan Kim
2020-11-20 17:09     ` Minchan Kim
2020-11-23 14:31     ` Catalin Marinas
2020-11-23 14:31       ` Catalin Marinas
2020-11-23 14:22   ` Catalin Marinas
2020-11-23 14:22     ` Catalin Marinas
2020-11-20 14:35 ` [PATCH 3/6] tlb: mmu_gather: Remove unused start/end arguments from tlb_finish_mmu() Will Deacon
2020-11-20 14:35   ` Will Deacon
2020-11-20 17:20   ` Linus Torvalds
2020-11-20 17:20     ` Linus Torvalds
2020-11-23 16:48     ` Will Deacon
2020-11-23 16:48       ` Will Deacon
2020-11-20 14:35 ` [PATCH 4/6] mm: proc: Invalidate TLB after clearing soft-dirty page state Will Deacon
2020-11-20 14:35   ` Will Deacon
2020-11-20 15:00   ` Peter Zijlstra
2020-11-20 15:00     ` Peter Zijlstra
2020-11-20 15:09     ` Peter Zijlstra
2020-11-20 15:09       ` Peter Zijlstra
2020-11-20 15:15     ` Will Deacon
2020-11-20 15:15       ` Will Deacon
2020-11-20 15:27       ` Peter Zijlstra
2020-11-20 15:27         ` Peter Zijlstra
2020-11-23 18:23         ` Will Deacon
2020-11-23 18:23           ` Will Deacon
2020-11-20 15:55     ` Minchan Kim
2020-11-20 15:55       ` Minchan Kim
2020-11-23 18:41       ` Will Deacon
2020-11-23 18:41         ` Will Deacon
2020-11-25 22:51         ` Minchan Kim
2020-11-25 22:51           ` Minchan Kim
2020-11-20 20:22   ` Yu Zhao
2020-11-20 20:22     ` Yu Zhao
2020-11-21  2:49     ` Yu Zhao
2020-11-21  2:49       ` Yu Zhao
2020-11-23 19:21       ` Yu Zhao
2020-11-23 19:21         ` Yu Zhao
2020-11-23 22:04       ` Will Deacon
2020-11-23 22:04         ` Will Deacon
2020-11-20 14:35 ` [PATCH 5/6] tlb: mmu_gather: Introduce tlb_gather_mmu_fullmm() Will Deacon
2020-11-20 14:35   ` Will Deacon
2020-11-20 17:22   ` Linus Torvalds
2020-11-20 17:22     ` Linus Torvalds
2020-11-20 17:31     ` Linus Torvalds
2020-11-20 17:31       ` Linus Torvalds
2020-11-23 16:48       ` Will Deacon
2020-11-23 16:48         ` Will Deacon
2020-11-22 15:11   ` [tlb] e242a269fa: WARNING:at_mm/mmu_gather.c:#tlb_gather_mmu kernel test robot
2020-11-23 17:51     ` Will Deacon
2020-11-23 17:51       ` Will Deacon
2020-11-20 14:35 ` [PATCH 6/6] mm: proc: Avoid fullmm flush for young/dirty bit toggling Will Deacon
2020-11-20 14:35   ` Will Deacon
2020-11-20 17:41   ` Linus Torvalds
2020-11-20 17:41     ` Linus Torvalds
2020-11-20 17:45     ` Linus Torvalds
2020-11-20 17:45       ` Linus Torvalds
2020-11-20 20:40   ` Yu Zhao
2020-11-20 20:40     ` Yu Zhao
2020-11-23 18:35     ` Will Deacon
2020-11-23 18:35       ` Will Deacon
2020-11-23 20:04       ` Yu Zhao
2020-11-23 20:04         ` Yu Zhao
2020-11-23 21:17         ` Will Deacon
2020-11-23 21:17           ` Will Deacon
2020-11-24  1:13           ` Yu Zhao
2020-11-24  1:13             ` Yu Zhao
2020-11-24 14:31             ` Will Deacon
2020-11-24 14:31               ` Will Deacon
2020-11-25 22:01             ` Minchan Kim
2020-11-25 22:01               ` Minchan Kim
2020-11-24 14:46     ` Peter Zijlstra
2020-11-24 14:46       ` Peter Zijlstra

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201120143557.6715-1-will@kernel.org \
    --to=will@kernel.org \
    --cc=anshuman.khandual@arm.com \
    --cc=catalin.marinas@arm.com \
    --cc=kernel-team@android.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-mm@kvack.org \
    --cc=minchan@kernel.org \
    --cc=peterz@infradead.org \
    --cc=torvalds@linux-foundation.org \
    --cc=yuzhao@google.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.