From: Rob Herring <robh@kernel.org>
To: conor.dooley@microchip.com
Cc: devicetree@vger.kernel.org, aou@eecs.berkeley.edu,
lewis.hanly@microchip.com, david.abdurachmanov@gmail.com,
daire.mcnamara@microchip.com, jassisinghbrar@gmail.com,
atish.patra@wdc.com, anup.patel@wdc.com, palmer@dabbelt.com,
paul.walmsley@sifive.com, cyril.jean@microchip.com,
linux-riscv@lists.infradead.org
Subject: Re: [PATCH 3/6] dt-bindings: add bindings for polarfire soc mailbox
Date: Fri, 20 Nov 2020 14:52:50 -0600 [thread overview]
Message-ID: <20201120205250.GB1716438@robh.at.kernel.org> (raw)
In-Reply-To: <20201119170432.18447-1-conor.dooley@microchip.com>
On Thu, Nov 19, 2020 at 05:04:32PM +0000, conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Add device tree bindings for the MSS system controller mailbox on
> the Microchip PolarFire SoC.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../mailbox/microchip,mpfs-mailbox.yaml | 46 +++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
>
> diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
> new file mode 100644
> index 000000000000..5d6ccaa13dc2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Microchip MPFS mss mailbox controller
> +
> +maintainers:
> + - Conor Dooley <conor.dooley@microchip.com>
> +
> +properties:
> + compatible:
> + const: microchip,polarfire-soc-mailbox # PolarFire
Comment is redundant.
> +
> + reg:
> + items:
> + - description: mailbox data registers
> + - description: mailbox int registers
> + maxItems: 2
maxItems is implied by size of 'items'.
> +
> + interrupts:
> + maxItems: 1
> +
> + "#mbox-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupt-parent
> + - interrupts
> + - "#mbox-cells"
> +
> +unevaluatedProperties: false
> +additionalProperties: false
Only need one and in this case additionalProperties.
> +
> +examples:
> + - |
> + mailbox@37020000 {
> + compatible = "microchip,polarfire-soc-mailbox";
> + reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>;
> + interrupt-parent = <&L1>;
> + interrupts = <96>;
> + #mbox-cells = <1>;
> + };
> --
> 2.17.1
>
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WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: conor.dooley@microchip.com
Cc: jassisinghbrar@gmail.com, aou@eecs.berkeley.edu,
paul.walmsley@sifive.com, palmer@dabbelt.com,
devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
lewis.hanly@microchip.com, cyril.jean@microchip.com,
daire.mcnamara@microchip.com, atish.patra@wdc.com,
anup.patel@wdc.com, david.abdurachmanov@gmail.com
Subject: Re: [PATCH 3/6] dt-bindings: add bindings for polarfire soc mailbox
Date: Fri, 20 Nov 2020 14:52:50 -0600 [thread overview]
Message-ID: <20201120205250.GB1716438@robh.at.kernel.org> (raw)
In-Reply-To: <20201119170432.18447-1-conor.dooley@microchip.com>
On Thu, Nov 19, 2020 at 05:04:32PM +0000, conor.dooley@microchip.com wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> Add device tree bindings for the MSS system controller mailbox on
> the Microchip PolarFire SoC.
>
> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
> ---
> .../mailbox/microchip,mpfs-mailbox.yaml | 46 +++++++++++++++++++
> 1 file changed, 46 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
>
> diff --git a/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
> new file mode 100644
> index 000000000000..5d6ccaa13dc2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml
> @@ -0,0 +1,46 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/mailbox/microchip,mpfs-mailbox.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Microchip MPFS mss mailbox controller
> +
> +maintainers:
> + - Conor Dooley <conor.dooley@microchip.com>
> +
> +properties:
> + compatible:
> + const: microchip,polarfire-soc-mailbox # PolarFire
Comment is redundant.
> +
> + reg:
> + items:
> + - description: mailbox data registers
> + - description: mailbox int registers
> + maxItems: 2
maxItems is implied by size of 'items'.
> +
> + interrupts:
> + maxItems: 1
> +
> + "#mbox-cells":
> + const: 1
> +
> +required:
> + - compatible
> + - reg
> + - interrupt-parent
> + - interrupts
> + - "#mbox-cells"
> +
> +unevaluatedProperties: false
> +additionalProperties: false
Only need one and in this case additionalProperties.
> +
> +examples:
> + - |
> + mailbox@37020000 {
> + compatible = "microchip,polarfire-soc-mailbox";
> + reg = <0x0 0x37020000 0x0 0x1000>, <0x0 0x2000318c 0x0 0x40>;
> + interrupt-parent = <&L1>;
> + interrupts = <96>;
> + #mbox-cells = <1>;
> + };
> --
> 2.17.1
>
next prev parent reply other threads:[~2020-11-20 20:53 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-19 17:04 [PATCH 3/6] dt-bindings: add bindings for polarfire soc mailbox conor.dooley
2020-11-19 17:04 ` conor.dooley
2020-11-20 0:14 ` Damien Le Moal
2020-11-20 0:14 ` Damien Le Moal
2020-11-30 13:17 ` Conor.Dooley
2020-11-30 13:17 ` Conor.Dooley
2020-11-20 20:49 ` Rob Herring
2020-11-20 20:49 ` Rob Herring
2020-11-20 20:52 ` Rob Herring [this message]
2020-11-20 20:52 ` Rob Herring
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