From: Lukasz Majewski <lukma@denx.de>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>, Peng Fan <peng.fan@nxp.com>,
Fugang Duan <fugang.duan@nxp.com>,
Shawn Guo <shawnguo@kernel.org>,
stefan.agner@toradex.com, netdev@vger.kernel.org,
linux-kernel@vger.kernel.org, krzk@kernel.org,
Vivien Didelot <vivien.didelot@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
Jakub Kicinski <kuba@kernel.org>,
Vladimir Oltean <olteanv@gmail.com>,
Fabio Estevam <festevam@gmail.com>,
"David S . Miller" <davem@davemloft.net>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [RFC 0/4] net: l2switch: Provide support for L2 switch on i.MX28 SoC
Date: Sun, 29 Nov 2020 22:59:11 +0100 [thread overview]
Message-ID: <20201129225911.7005923a@jawa> (raw)
In-Reply-To: <61fc64a6-a02b-3806-49fa-a916c6d9581a@gmail.com>
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Hi Florian,
> On 11/27/2020 4:33 PM, Lukasz Majewski wrote:
> >> So why use DSA at all? What benefit does it bring you? Why not do
> >> the entire switch configuration from within FEC, or a separate
> >> driver very closely related to it?
> >
> > Mine rationale to use DSA and FEC:
> > - Make as little changes to FEC as possible
>
> Which is entirely possible if you stick to Vladimir suggestions of
> exporting services for the MTIP switch driver.
Ok.
>
> >
> > - Provide separate driver to allow programming FDB, MDB, VLAN setup.
> > This seems straightforward as MTIP has separate memory region
> > (from FEC) for switch configuration, statistics, learning, static
> > table programming. What is even more bizarre FEC and MTIP have the
> > same 8 registers (with different base address and +4 offset :-) ) as
> > interface to handle DMA0 transfers.
>
> OK, not sure how that is relevant here? The register organization
> should never ever dictate how to pick a particular subsystem.
>
> >
> > - According to MTIP description from NXP documentation, there is a
> > separate register for frame forwarding, so it _shall_ also fit
> > into DSA.
>
> And yet it does not, Vladimir went into great length into explaining
> what makes the MTIP + dual FEC different here and why it does not
> qualify for DSA.
I'm very grateful for this insight and explanation from Vladimir.
> Basically any time you have DMA + integrated switch
> tightly coupled you have what we have coined a "pure switchdev"
> wrapper.
Ok.
>
> >
> >
> > For me it would be enough to have:
> >
> > - lan{12} - so I could enable/disable it on demand (control when
> > switch ports are passing or not packets).
> >
> > - Use standard net tools (like bridge) to setup FDB/MDB, vlan
> >
> > - Read statistics from MTIP ports (all of them)
> >
> > - I can use lan1 (bridged or not) to send data outside. It would be
> > also correct to use eth0.
>
> You know you can do that without having DSA, right? Look at mlxsw,
> look at rocker. You can call multiple times register_netdevice() with
> custom network devices that behave differently whether HW bridging
> offload is offered or not, whether the switch is declared in Device
> Tree or not.
I will look into those examples and try to follow them for MTIP.
>
> >
> > I'm for the most pragmatic (and simple) solution, which fulfill
> > above requirements.
>
> The most pragmatic solution is to implement switchdev operations to
> offer HW bridging offload, VLAN programming, FDB/MDB programming.
Ok.
>
> It seems to me that you are trying to look for a framework to avoid
> doing a bit of middle layer work between switchdev and the FEC driver
> and that is not setting you for success.
I'm not afraid to rework FEC. I just thought that DSA would be the best
fit for the MTIP. However, after posting the RFC, the community gave me
arguments that I was wrong.
I'm happy for having so detailed feedback :-).
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
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WARNING: multiple messages have this Message-ID (diff)
From: Lukasz Majewski <lukma@denx.de>
To: Florian Fainelli <f.fainelli@gmail.com>
Cc: Vladimir Oltean <olteanv@gmail.com>,
Fugang Duan <fugang.duan@nxp.com>,
"David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
netdev@vger.kernel.org, Andrew Lunn <andrew@lunn.ch>,
Fabio Estevam <festevam@gmail.com>,
Vivien Didelot <vivien.didelot@gmail.com>,
NXP Linux Team <linux-imx@nxp.com>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Peng Fan <peng.fan@nxp.com>,
stefan.agner@toradex.com, krzk@kernel.org,
Shawn Guo <shawnguo@kernel.org>
Subject: Re: [RFC 0/4] net: l2switch: Provide support for L2 switch on i.MX28 SoC
Date: Sun, 29 Nov 2020 22:59:11 +0100 [thread overview]
Message-ID: <20201129225911.7005923a@jawa> (raw)
In-Reply-To: <61fc64a6-a02b-3806-49fa-a916c6d9581a@gmail.com>
[-- Attachment #1: Type: text/plain, Size: 3320 bytes --]
Hi Florian,
> On 11/27/2020 4:33 PM, Lukasz Majewski wrote:
> >> So why use DSA at all? What benefit does it bring you? Why not do
> >> the entire switch configuration from within FEC, or a separate
> >> driver very closely related to it?
> >
> > Mine rationale to use DSA and FEC:
> > - Make as little changes to FEC as possible
>
> Which is entirely possible if you stick to Vladimir suggestions of
> exporting services for the MTIP switch driver.
Ok.
>
> >
> > - Provide separate driver to allow programming FDB, MDB, VLAN setup.
> > This seems straightforward as MTIP has separate memory region
> > (from FEC) for switch configuration, statistics, learning, static
> > table programming. What is even more bizarre FEC and MTIP have the
> > same 8 registers (with different base address and +4 offset :-) ) as
> > interface to handle DMA0 transfers.
>
> OK, not sure how that is relevant here? The register organization
> should never ever dictate how to pick a particular subsystem.
>
> >
> > - According to MTIP description from NXP documentation, there is a
> > separate register for frame forwarding, so it _shall_ also fit
> > into DSA.
>
> And yet it does not, Vladimir went into great length into explaining
> what makes the MTIP + dual FEC different here and why it does not
> qualify for DSA.
I'm very grateful for this insight and explanation from Vladimir.
> Basically any time you have DMA + integrated switch
> tightly coupled you have what we have coined a "pure switchdev"
> wrapper.
Ok.
>
> >
> >
> > For me it would be enough to have:
> >
> > - lan{12} - so I could enable/disable it on demand (control when
> > switch ports are passing or not packets).
> >
> > - Use standard net tools (like bridge) to setup FDB/MDB, vlan
> >
> > - Read statistics from MTIP ports (all of them)
> >
> > - I can use lan1 (bridged or not) to send data outside. It would be
> > also correct to use eth0.
>
> You know you can do that without having DSA, right? Look at mlxsw,
> look at rocker. You can call multiple times register_netdevice() with
> custom network devices that behave differently whether HW bridging
> offload is offered or not, whether the switch is declared in Device
> Tree or not.
I will look into those examples and try to follow them for MTIP.
>
> >
> > I'm for the most pragmatic (and simple) solution, which fulfill
> > above requirements.
>
> The most pragmatic solution is to implement switchdev operations to
> offer HW bridging offload, VLAN programming, FDB/MDB programming.
Ok.
>
> It seems to me that you are trying to look for a framework to avoid
> doing a bit of middle layer work between switchdev and the FEC driver
> and that is not setting you for success.
I'm not afraid to rework FEC. I just thought that DSA would be the best
fit for the MTIP. However, after posting the RFC, the community gave me
arguments that I was wrong.
I'm happy for having so detailed feedback :-).
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lukma@denx.de
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[-- Type: application/pgp-signature, Size: 488 bytes --]
next prev parent reply other threads:[~2020-11-29 22:02 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-25 23:24 [RFC 0/4] net: l2switch: Provide support for L2 switch on i.MX28 SoC Lukasz Majewski
2020-11-25 23:24 ` Lukasz Majewski
2020-11-25 23:24 ` [RFC 1/4] net: fec: Move some defines to ./drivers/net/ethernet/freescale/fec.h header Lukasz Majewski
2020-11-25 23:24 ` Lukasz Majewski
2020-11-25 23:24 ` [RFC 2/4] net: dsa: Provide DSA driver for NXP's More Than IP L2 switch Lukasz Majewski
2020-11-25 23:24 ` Lukasz Majewski
2020-11-25 23:24 ` [RFC 3/4] net: imx: l2switch: Adjust fec_main.c to provide support for " Lukasz Majewski
2020-11-25 23:24 ` Lukasz Majewski
2020-11-25 23:24 ` [RFC 4/4] ARM: dts: imx28: Add description for L2 switch on XEA board Lukasz Majewski
2020-11-25 23:24 ` Lukasz Majewski
2020-11-26 0:00 ` [RFC 0/4] net: l2switch: Provide support for L2 switch on i.MX28 SoC Andrew Lunn
2020-11-26 0:00 ` Andrew Lunn
2020-11-26 1:30 ` Florian Fainelli
2020-11-26 1:30 ` Florian Fainelli
2020-11-26 3:10 ` Andrew Lunn
2020-11-26 3:10 ` Andrew Lunn
2020-11-26 10:10 ` Lukasz Majewski
2020-11-26 10:10 ` Lukasz Majewski
2020-11-26 14:45 ` Andrew Lunn
2020-11-26 14:45 ` Andrew Lunn
2020-11-27 0:03 ` Lukasz Majewski
2020-11-27 0:03 ` Lukasz Majewski
2020-11-26 12:30 ` Vladimir Oltean
2020-11-26 12:30 ` Vladimir Oltean
2020-11-26 23:35 ` Lukasz Majewski
2020-11-26 23:35 ` Lukasz Majewski
2020-11-27 0:55 ` Andrew Lunn
2020-11-27 0:55 ` Andrew Lunn
2020-11-27 9:16 ` Lukasz Majewski
2020-11-27 9:16 ` Lukasz Majewski
2020-11-27 1:08 ` Andrew Lunn
2020-11-27 1:08 ` Andrew Lunn
2020-11-27 9:25 ` Lukasz Majewski
2020-11-27 9:25 ` Lukasz Majewski
2020-11-27 15:10 ` Andrew Lunn
2020-11-27 15:10 ` Andrew Lunn
2021-06-17 11:08 ` Lukasz Majewski
2021-06-17 11:08 ` Lukasz Majewski
2021-06-17 13:57 ` Andrew Lunn
2021-06-17 13:57 ` Andrew Lunn
2020-11-27 19:29 ` Vladimir Oltean
2020-11-27 19:29 ` Vladimir Oltean
2020-11-28 0:33 ` Lukasz Majewski
2020-11-28 0:33 ` Lukasz Majewski
2020-11-28 4:34 ` Florian Fainelli
2020-11-28 4:34 ` Florian Fainelli
2020-11-29 21:59 ` Lukasz Majewski [this message]
2020-11-29 21:59 ` Lukasz Majewski
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