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From: <conor.dooley@microchip.com>
To: <robh+dt@kernel.org>, <damien.lemoal@wdc.com>,
	<jassisinghbrar@gmail.com>,  <aou@eecs.berkeley.edu>,
	<paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
	 <devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: cyril.jean@microchip.com, david.abdurachmanov@gmail.com,
	daire.mcnamara@microchip.com, anup.patel@wdc.com,
	atish.patra@wdc.com, Conor Dooley <conor.dooley@microchip.com>,
	lewis.hanly@microchip.com
Subject: [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller
Date: Tue, 1 Dec 2020 11:03:11 +0000	[thread overview]
Message-ID: <20201201110311.28593-1-conor.dooley@microchip.com> (raw)

From: Conor Dooley <conor.dooley@microchip.com>

Add device tree bindings for the MSS system controller on
the Microchip PolarFire SoC.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../microchip,mpfs_sys_controller.yaml        | 49 +++++++++++++++++++
 1 file changed, 49 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml

diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
new file mode 100644
index 000000000000..c22fc203b95c
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/microchip/microchip,mpfs_sys_controller.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Microchip MPFS system controller
+
+maintainers:
+  - Conor Dooley <conor.dooley@microchip.com>
+
+properties:
+  compatible:
+    const: microchip,polarfire-soc-sys-controller
+
+  mbox-names:
+    maxItems: 1
+    description: name of the mailbox controller device node
+
+  mboxes:
+    maxItems: 1
+    description: |
+      phandle and index of the mailbox controller device node. It must be 0 (hardware supports only one channel).
+
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+required:
+  - compatible
+  - mbox-names
+  - "#address-cells"
+  - "#size-cells"
+  - "mboxes"
+
+additionalProperties: false
+
+examples:
+  - |
+    syscontroller: syscontroller {
+      compatible = "microchip,polarfire-soc-sys-controller";
+      #address-cells = <1>;
+      #size-cells = <1>;
+      mbox-names = "mbox-mpfs";
+      mboxes = <&mbox 0>;
+    };
-- 
2.17.1


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WARNING: multiple messages have this Message-ID (diff)
From: <conor.dooley@microchip.com>
To: <robh+dt@kernel.org>, <damien.lemoal@wdc.com>,
	<jassisinghbrar@gmail.com>, <aou@eecs.berkeley.edu>,
	<paul.walmsley@sifive.com>, <palmer@dabbelt.com>,
	<devicetree@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: <lewis.hanly@microchip.com>, <cyril.jean@microchip.com>,
	<daire.mcnamara@microchip.com>, <atish.patra@wdc.com>,
	<anup.patel@wdc.com>, <david.abdurachmanov@gmail.com>,
	Conor Dooley <conor.dooley@microchip.com>
Subject: [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller
Date: Tue, 1 Dec 2020 11:03:11 +0000	[thread overview]
Message-ID: <20201201110311.28593-1-conor.dooley@microchip.com> (raw)

From: Conor Dooley <conor.dooley@microchip.com>

Add device tree bindings for the MSS system controller on
the Microchip PolarFire SoC.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 .../microchip,mpfs_sys_controller.yaml        | 49 +++++++++++++++++++
 1 file changed, 49 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml

diff --git a/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
new file mode 100644
index 000000000000..c22fc203b95c
--- /dev/null
+++ b/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs_sys_controller.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: "http://devicetree.org/schemas/soc/microchip/microchip,mpfs_sys_controller.yaml#"
+$schema: "http://devicetree.org/meta-schemas/core.yaml#"
+
+title: Microchip MPFS system controller
+
+maintainers:
+  - Conor Dooley <conor.dooley@microchip.com>
+
+properties:
+  compatible:
+    const: microchip,polarfire-soc-sys-controller
+
+  mbox-names:
+    maxItems: 1
+    description: name of the mailbox controller device node
+
+  mboxes:
+    maxItems: 1
+    description: |
+      phandle and index of the mailbox controller device node. It must be 0 (hardware supports only one channel).
+
+
+  "#address-cells":
+    const: 1
+
+  "#size-cells":
+    const: 1
+
+required:
+  - compatible
+  - mbox-names
+  - "#address-cells"
+  - "#size-cells"
+  - "mboxes"
+
+additionalProperties: false
+
+examples:
+  - |
+    syscontroller: syscontroller {
+      compatible = "microchip,polarfire-soc-sys-controller";
+      #address-cells = <1>;
+      #size-cells = <1>;
+      mbox-names = "mbox-mpfs";
+      mboxes = <&mbox 0>;
+    };
-- 
2.17.1


             reply	other threads:[~2020-12-01 11:03 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-01 11:03 conor.dooley [this message]
2020-12-01 11:03 ` [PATCH v2 4/5] dt-bindings: add bindings for polarfire soc system controller conor.dooley
2020-12-07 15:53 ` Rob Herring
2020-12-07 15:53   ` Rob Herring
2020-12-07 15:56 ` Rob Herring
2020-12-07 15:56   ` Rob Herring
2020-12-15 16:10   ` Conor.Dooley
2020-12-15 16:10     ` Conor.Dooley

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