* [PATCH v3 01/12] [testing] disable xhci msix
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 11:00 ` Michael S. Tsirkin
2020-12-03 10:54 ` [PATCH v3 02/12] x86: rewrite gsi_handler() Gerd Hoffmann
` (11 subsequent siblings)
12 siblings, 1 reply; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
hw/usb/hcd-xhci-pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c
index bba628d3d230..5def3ea55ff3 100644
--- a/hw/usb/hcd-xhci-pci.c
+++ b/hw/usb/hcd-xhci-pci.c
@@ -239,7 +239,7 @@ static void qemu_xhci_instance_init(Object *obj)
XHCIState *xhci = &s->xhci;
s->msi = ON_OFF_AUTO_OFF;
- s->msix = ON_OFF_AUTO_AUTO;
+ s->msix = ON_OFF_AUTO_OFF;
xhci->numintrs = XHCI_MAXINTRS;
xhci->numslots = XHCI_MAXSLOTS;
xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST);
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 01/12] [testing] disable xhci msix
2020-12-03 10:54 ` [PATCH v3 01/12] [testing] disable xhci msix Gerd Hoffmann
@ 2020-12-03 11:00 ` Michael S. Tsirkin
2020-12-03 11:19 ` Gerd Hoffmann
0 siblings, 1 reply; 21+ messages in thread
From: Michael S. Tsirkin @ 2020-12-03 11:00 UTC (permalink / raw)
To: Gerd Hoffmann
Cc: Eduardo Habkost, Sergio Lopez, Richard Henderson, qemu-devel,
Igor Mammedov, Paolo Bonzini, Richard Henderson
On Thu, Dec 03, 2020 at 11:54:12AM +0100, Gerd Hoffmann wrote:
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
A bit more context on why you are doing this?
> ---
> hw/usb/hcd-xhci-pci.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/usb/hcd-xhci-pci.c b/hw/usb/hcd-xhci-pci.c
> index bba628d3d230..5def3ea55ff3 100644
> --- a/hw/usb/hcd-xhci-pci.c
> +++ b/hw/usb/hcd-xhci-pci.c
> @@ -239,7 +239,7 @@ static void qemu_xhci_instance_init(Object *obj)
> XHCIState *xhci = &s->xhci;
>
> s->msi = ON_OFF_AUTO_OFF;
> - s->msix = ON_OFF_AUTO_AUTO;
> + s->msix = ON_OFF_AUTO_OFF;
> xhci->numintrs = XHCI_MAXINTRS;
> xhci->numslots = XHCI_MAXSLOTS;
> xhci_set_flag(xhci, XHCI_FLAG_SS_FIRST);
> --
> 2.27.0
^ permalink raw reply [flat|nested] 21+ messages in thread
* Re: [PATCH v3 01/12] [testing] disable xhci msix
2020-12-03 11:00 ` Michael S. Tsirkin
@ 2020-12-03 11:19 ` Gerd Hoffmann
0 siblings, 0 replies; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 11:19 UTC (permalink / raw)
To: Michael S. Tsirkin
Cc: Eduardo Habkost, Sergio Lopez, Richard Henderson, qemu-devel,
Igor Mammedov, Paolo Bonzini, Richard Henderson
On Thu, Dec 03, 2020 at 06:00:54AM -0500, Michael S. Tsirkin wrote:
> On Thu, Dec 03, 2020 at 11:54:12AM +0100, Gerd Hoffmann wrote:
> > Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
>
> A bit more context on why you are doing this?
Scratch the patch, I just forgot to pass in --base so git publish skips
this one when mailing the series.
I'm using it to have a pcie device without msi support so I can check
whenever pci link interrupts are working properly.
take care,
Gerd
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 02/12] x86: rewrite gsi_handler()
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
2020-12-03 10:54 ` [PATCH v3 01/12] [testing] disable xhci msix Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 10:54 ` [PATCH v3 03/12] x86: add support for second ioapic Gerd Hoffmann
` (10 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
Rewrite function to use switch() for IRQ number mapping.
Check i8259_irq exists before raising it so the function
also works in case no i8259 (aka pic) is present.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
hw/i386/x86.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index 5944fc44edca..b67e7b789f89 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -588,11 +588,17 @@ void gsi_handler(void *opaque, int n, int level)
GSIState *s = opaque;
trace_x86_gsi_interrupt(n, level);
- if (n < ISA_NUM_IRQS) {
- /* Under KVM, Kernel will forward to both PIC and IOAPIC */
- qemu_set_irq(s->i8259_irq[n], level);
+ switch (n) {
+ case 0 ... ISA_NUM_IRQS - 1:
+ if (s->i8259_irq[n]) {
+ /* Under KVM, Kernel will forward to both PIC and IOAPIC */
+ qemu_set_irq(s->i8259_irq[n], level);
+ }
+ /* fall through */
+ case ISA_NUM_IRQS ... IOAPIC_NUM_PINS - 1:
+ qemu_set_irq(s->ioapic_irq[n], level);
+ break;
}
- qemu_set_irq(s->ioapic_irq[n], level);
}
void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name)
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v3 03/12] x86: add support for second ioapic
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
2020-12-03 10:54 ` [PATCH v3 01/12] [testing] disable xhci msix Gerd Hoffmann
2020-12-03 10:54 ` [PATCH v3 02/12] x86: rewrite gsi_handler() Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 13:21 ` Sergio Lopez
2020-12-03 10:54 ` [PATCH v3 04/12] microvm: make number of virtio transports runtime changeable Gerd Hoffmann
` (9 subsequent siblings)
12 siblings, 1 reply; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
Add ioapic_init_secondary to initialize it, wire up
in gsi handling and acpi apic table creation.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
include/hw/i386/ioapic.h | 2 ++
include/hw/i386/ioapic_internal.h | 2 +-
include/hw/i386/x86.h | 3 +++
hw/i386/acpi-common.c | 10 ++++++++++
hw/i386/x86.c | 21 +++++++++++++++++++++
5 files changed, 37 insertions(+), 1 deletion(-)
diff --git a/include/hw/i386/ioapic.h b/include/hw/i386/ioapic.h
index 06bfaaeac6b8..ef37b8a9fda1 100644
--- a/include/hw/i386/ioapic.h
+++ b/include/hw/i386/ioapic.h
@@ -22,6 +22,8 @@
#define IOAPIC_NUM_PINS 24
#define IO_APIC_DEFAULT_ADDRESS 0xfec00000
+#define IO_APIC_SECONDARY_ADDRESS (IO_APIC_DEFAULT_ADDRESS + 0x10000)
+#define IO_APIC_SECONDARY_IRQBASE 24 /* primary 0 -> 23, secondary 24 -> 47 */
#define TYPE_KVM_IOAPIC "kvm-ioapic"
#define TYPE_IOAPIC "ioapic"
diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h
index 0f9002a2c23e..021e715f1131 100644
--- a/include/hw/i386/ioapic_internal.h
+++ b/include/hw/i386/ioapic_internal.h
@@ -27,7 +27,7 @@
#include "qemu/notify.h"
#include "qom/object.h"
-#define MAX_IOAPICS 1
+#define MAX_IOAPICS 2
#define IOAPIC_LVT_DEST_SHIFT 56
#define IOAPIC_LVT_DEST_IDX_SHIFT 48
diff --git a/include/hw/i386/x86.h b/include/hw/i386/x86.h
index 739fac50871b..3f9b052cfc34 100644
--- a/include/hw/i386/x86.h
+++ b/include/hw/i386/x86.h
@@ -50,6 +50,7 @@ struct X86MachineState {
ISADevice *rtc;
FWCfgState *fw_cfg;
qemu_irq *gsi;
+ DeviceState *ioapic2;
GMappedFile *initrd_mapped_file;
HotplugHandler *acpi_dev;
@@ -120,10 +121,12 @@ bool x86_machine_is_acpi_enabled(const X86MachineState *x86ms);
typedef struct GSIState {
qemu_irq i8259_irq[ISA_NUM_IRQS];
qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
+ qemu_irq ioapic2_irq[IOAPIC_NUM_PINS];
} GSIState;
qemu_irq x86_allocate_cpu_irq(void);
void gsi_handler(void *opaque, int n, int level);
void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name);
+DeviceState *ioapic_init_secondary(GSIState *gsi_state);
#endif
diff --git a/hw/i386/acpi-common.c b/hw/i386/acpi-common.c
index 8a769654060e..a6a30e836339 100644
--- a/hw/i386/acpi-common.c
+++ b/hw/i386/acpi-common.c
@@ -103,6 +103,16 @@ void acpi_build_madt(GArray *table_data, BIOSLinker *linker,
io_apic->address = cpu_to_le32(IO_APIC_DEFAULT_ADDRESS);
io_apic->interrupt = cpu_to_le32(0);
+ if (x86ms->ioapic2) {
+ AcpiMadtIoApic *io_apic2;
+ io_apic2 = acpi_data_push(table_data, sizeof *io_apic);
+ io_apic2->type = ACPI_APIC_IO;
+ io_apic2->length = sizeof(*io_apic);
+ io_apic2->io_apic_id = ACPI_BUILD_IOAPIC_ID + 1;
+ io_apic2->address = cpu_to_le32(IO_APIC_SECONDARY_ADDRESS);
+ io_apic2->interrupt = cpu_to_le32(IO_APIC_SECONDARY_IRQBASE);
+ }
+
if (x86ms->apic_xrupt_override) {
intsrcovr = acpi_data_push(table_data, sizeof *intsrcovr);
intsrcovr->type = ACPI_APIC_XRUPT_OVERRIDE;
diff --git a/hw/i386/x86.c b/hw/i386/x86.c
index b67e7b789f89..d68a9eaefc2c 100644
--- a/hw/i386/x86.c
+++ b/hw/i386/x86.c
@@ -598,6 +598,10 @@ void gsi_handler(void *opaque, int n, int level)
case ISA_NUM_IRQS ... IOAPIC_NUM_PINS - 1:
qemu_set_irq(s->ioapic_irq[n], level);
break;
+ case IO_APIC_SECONDARY_IRQBASE
+ ... IO_APIC_SECONDARY_IRQBASE + IOAPIC_NUM_PINS - 1:
+ qemu_set_irq(s->ioapic2_irq[n - IO_APIC_SECONDARY_IRQBASE], level);
+ break;
}
}
@@ -624,6 +628,23 @@ void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name)
}
}
+DeviceState *ioapic_init_secondary(GSIState *gsi_state)
+{
+ DeviceState *dev;
+ SysBusDevice *d;
+ unsigned int i;
+
+ dev = qdev_new(TYPE_IOAPIC);
+ d = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(d, &error_fatal);
+ sysbus_mmio_map(d, 0, IO_APIC_SECONDARY_ADDRESS);
+
+ for (i = 0; i < IOAPIC_NUM_PINS; i++) {
+ gsi_state->ioapic2_irq[i] = qdev_get_gpio_in(dev, i);
+ }
+ return dev;
+}
+
struct setup_data {
uint64_t next;
uint32_t type;
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 03/12] x86: add support for second ioapic
2020-12-03 10:54 ` [PATCH v3 03/12] x86: add support for second ioapic Gerd Hoffmann
@ 2020-12-03 13:21 ` Sergio Lopez
0 siblings, 0 replies; 21+ messages in thread
From: Sergio Lopez @ 2020-12-03 13:21 UTC (permalink / raw)
To: Gerd Hoffmann
Cc: Eduardo Habkost, Michael S. Tsirkin, Richard Henderson,
qemu-devel, Igor Mammedov, Paolo Bonzini, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 591 bytes --]
On Thu, Dec 03, 2020 at 11:54:14AM +0100, Gerd Hoffmann wrote:
> Add ioapic_init_secondary to initialize it, wire up
> in gsi handling and acpi apic table creation.
>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
> include/hw/i386/ioapic.h | 2 ++
> include/hw/i386/ioapic_internal.h | 2 +-
> include/hw/i386/x86.h | 3 +++
> hw/i386/acpi-common.c | 10 ++++++++++
> hw/i386/x86.c | 21 +++++++++++++++++++++
> 5 files changed, 37 insertions(+), 1 deletion(-)
Reviewed-by: Sergio Lopez <slp@redhat.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 04/12] microvm: make number of virtio transports runtime changeable
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (2 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 03/12] x86: add support for second ioapic Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 13:26 ` Sergio Lopez
2020-12-03 10:54 ` [PATCH v3 05/12] microvm: make pcie irq base " Gerd Hoffmann
` (8 subsequent siblings)
12 siblings, 1 reply; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
This will allow to increase the number of transports in
case we have enough irq lines available for them all.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
include/hw/i386/microvm.h | 2 +-
hw/i386/microvm.c | 9 +++++++--
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h
index 0fc216007777..c5d60bacb5e8 100644
--- a/include/hw/i386/microvm.h
+++ b/include/hw/i386/microvm.h
@@ -52,7 +52,6 @@
/* Platform virtio definitions */
#define VIRTIO_MMIO_BASE 0xfeb00000
-#define VIRTIO_NUM_TRANSPORTS 8
#define VIRTIO_CMDLINE_MAXLEN 64
#define GED_MMIO_BASE 0xfea00000
@@ -98,6 +97,7 @@ struct MicrovmMachineState {
/* Machine state */
uint32_t virtio_irq_base;
+ uint32_t virtio_num_transports;
bool kernel_cmdline_fixed;
Notifier machine_done;
Notifier powerdown_req;
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index 5428448b7059..e92f236bf442 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -178,8 +178,13 @@ static void microvm_devices_init(MicrovmMachineState *mms)
kvmclock_create(true);
- mms->virtio_irq_base = x86_machine_is_acpi_enabled(x86ms) ? 16 : 5;
- for (i = 0; i < VIRTIO_NUM_TRANSPORTS; i++) {
+ mms->virtio_irq_base = 5;
+ mms->virtio_num_transports = 8;
+ if (x86_machine_is_acpi_enabled(x86ms)) {
+ mms->virtio_irq_base = 16;
+ }
+
+ for (i = 0; i < mms->virtio_num_transports; i++) {
sysbus_create_simple("virtio-mmio",
VIRTIO_MMIO_BASE + i * 512,
x86ms->gsi[mms->virtio_irq_base + i]);
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 04/12] microvm: make number of virtio transports runtime changeable
2020-12-03 10:54 ` [PATCH v3 04/12] microvm: make number of virtio transports runtime changeable Gerd Hoffmann
@ 2020-12-03 13:26 ` Sergio Lopez
0 siblings, 0 replies; 21+ messages in thread
From: Sergio Lopez @ 2020-12-03 13:26 UTC (permalink / raw)
To: Gerd Hoffmann
Cc: Eduardo Habkost, Michael S. Tsirkin, Richard Henderson,
qemu-devel, Igor Mammedov, Paolo Bonzini, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 423 bytes --]
On Thu, Dec 03, 2020 at 11:54:15AM +0100, Gerd Hoffmann wrote:
> This will allow to increase the number of transports in
> case we have enough irq lines available for them all.
>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
> include/hw/i386/microvm.h | 2 +-
> hw/i386/microvm.c | 9 +++++++--
> 2 files changed, 8 insertions(+), 3 deletions(-)
Reviewed-by: Sergio Lopez <slp@redhat.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 05/12] microvm: make pcie irq base runtime changeable
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (3 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 04/12] microvm: make number of virtio transports runtime changeable Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 13:27 ` Sergio Lopez
2020-12-03 10:54 ` [PATCH v3 06/12] microvm: drop microvm_gsi_handler() Gerd Hoffmann
` (7 subsequent siblings)
12 siblings, 1 reply; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
Allows to move them in case we have enough
irq lines available.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
include/hw/i386/microvm.h | 2 +-
hw/i386/microvm.c | 11 ++++++-----
2 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h
index c5d60bacb5e8..f1e9db059b85 100644
--- a/include/hw/i386/microvm.h
+++ b/include/hw/i386/microvm.h
@@ -66,7 +66,6 @@
#define PCIE_MMIO_SIZE 0x20000000
#define PCIE_ECAM_BASE 0xe0000000
#define PCIE_ECAM_SIZE 0x10000000
-#define PCIE_IRQ_BASE 12
/* Machine type options */
#define MICROVM_MACHINE_PIT "pit"
@@ -96,6 +95,7 @@ struct MicrovmMachineState {
bool auto_kernel_cmdline;
/* Machine state */
+ uint32_t pcie_irq_base;
uint32_t virtio_irq_base;
uint32_t virtio_num_transports;
bool kernel_cmdline_fixed;
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index e92f236bf442..5e4182b47464 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -181,6 +181,7 @@ static void microvm_devices_init(MicrovmMachineState *mms)
mms->virtio_irq_base = 5;
mms->virtio_num_transports = 8;
if (x86_machine_is_acpi_enabled(x86ms)) {
+ mms->pcie_irq_base = 12;
mms->virtio_irq_base = 16;
}
@@ -226,12 +227,12 @@ static void microvm_devices_init(MicrovmMachineState *mms)
mms->gpex.mmio32.size = PCIE_MMIO_SIZE;
mms->gpex.ecam.base = PCIE_ECAM_BASE;
mms->gpex.ecam.size = PCIE_ECAM_SIZE;
- mms->gpex.irq = PCIE_IRQ_BASE;
+ mms->gpex.irq = mms->pcie_irq_base;
create_gpex(mms);
- x86ms->pci_irq_mask = ((1 << (PCIE_IRQ_BASE + 0)) |
- (1 << (PCIE_IRQ_BASE + 1)) |
- (1 << (PCIE_IRQ_BASE + 2)) |
- (1 << (PCIE_IRQ_BASE + 3)));
+ x86ms->pci_irq_mask = ((1 << (mms->pcie_irq_base + 0)) |
+ (1 << (mms->pcie_irq_base + 1)) |
+ (1 << (mms->pcie_irq_base + 2)) |
+ (1 << (mms->pcie_irq_base + 3)));
} else {
x86ms->pci_irq_mask = 0;
}
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 05/12] microvm: make pcie irq base runtime changeable
2020-12-03 10:54 ` [PATCH v3 05/12] microvm: make pcie irq base " Gerd Hoffmann
@ 2020-12-03 13:27 ` Sergio Lopez
0 siblings, 0 replies; 21+ messages in thread
From: Sergio Lopez @ 2020-12-03 13:27 UTC (permalink / raw)
To: Gerd Hoffmann
Cc: Eduardo Habkost, Michael S. Tsirkin, Richard Henderson,
qemu-devel, Igor Mammedov, Paolo Bonzini, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 433 bytes --]
On Thu, Dec 03, 2020 at 11:54:16AM +0100, Gerd Hoffmann wrote:
> Allows to move them in case we have enough
> irq lines available.
>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> include/hw/i386/microvm.h | 2 +-
> hw/i386/microvm.c | 11 ++++++-----
> 2 files changed, 7 insertions(+), 6 deletions(-)
Reviewed-by: Sergio Lopez <slp@redhat.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 06/12] microvm: drop microvm_gsi_handler()
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (4 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 05/12] microvm: make pcie irq base " Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 13:27 ` Sergio Lopez
2020-12-03 10:54 ` [PATCH v3 07/12] microvm: add second ioapic Gerd Hoffmann
` (6 subsequent siblings)
12 siblings, 1 reply; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
With the improved gsi_handler() we don't need
our private version any more.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
---
hw/i386/microvm.c | 14 +-------------
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index 5e4182b47464..829b376a1278 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -96,13 +96,6 @@ static void microvm_set_rtc(MicrovmMachineState *mms, ISADevice *s)
rtc_set_memory(s, 0x5d, val >> 16);
}
-static void microvm_gsi_handler(void *opaque, int n, int level)
-{
- GSIState *s = opaque;
-
- qemu_set_irq(s->ioapic_irq[n], level);
-}
-
static void create_gpex(MicrovmMachineState *mms)
{
X86MachineState *x86ms = X86_MACHINE(mms);
@@ -163,12 +156,7 @@ static void microvm_devices_init(MicrovmMachineState *mms)
/* Core components */
gsi_state = g_malloc0(sizeof(*gsi_state));
- if (mms->pic == ON_OFF_AUTO_ON || mms->pic == ON_OFF_AUTO_AUTO) {
- x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
- } else {
- x86ms->gsi = qemu_allocate_irqs(microvm_gsi_handler,
- gsi_state, GSI_NUM_PINS);
- }
+ x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(),
&error_abort);
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 06/12] microvm: drop microvm_gsi_handler()
2020-12-03 10:54 ` [PATCH v3 06/12] microvm: drop microvm_gsi_handler() Gerd Hoffmann
@ 2020-12-03 13:27 ` Sergio Lopez
0 siblings, 0 replies; 21+ messages in thread
From: Sergio Lopez @ 2020-12-03 13:27 UTC (permalink / raw)
To: Gerd Hoffmann
Cc: Eduardo Habkost, Michael S. Tsirkin, Richard Henderson,
qemu-devel, Igor Mammedov, Paolo Bonzini, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 401 bytes --]
On Thu, Dec 03, 2020 at 11:54:17AM +0100, Gerd Hoffmann wrote:
> With the improved gsi_handler() we don't need
> our private version any more.
>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
> ---
> hw/i386/microvm.c | 14 +-------------
> 1 file changed, 1 insertion(+), 13 deletions(-)
Reviewed-by: Sergio Lopez <slp@redhat.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 07/12] microvm: add second ioapic
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (5 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 06/12] microvm: drop microvm_gsi_handler() Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 15:12 ` Sergio Lopez
2020-12-03 10:54 ` [PATCH v3 08/12] tests/acpi: allow updates for expected data files Gerd Hoffmann
` (5 subsequent siblings)
12 siblings, 1 reply; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
Create second ioapic, route virtio-mmio IRQs to it,
allow more virtio-mmio devices (24 instead of 8).
Needs ACPI, enabled by default, can be turned off
using -machine ioapic2=off
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
include/hw/i386/microvm.h | 2 ++
hw/i386/microvm.c | 56 +++++++++++++++++++++++++++++++---
tests/qtest/bios-tables-test.c | 8 ++---
3 files changed, 57 insertions(+), 9 deletions(-)
diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h
index f1e9db059b85..f25f8374413f 100644
--- a/include/hw/i386/microvm.h
+++ b/include/hw/i386/microvm.h
@@ -72,6 +72,7 @@
#define MICROVM_MACHINE_PIC "pic"
#define MICROVM_MACHINE_RTC "rtc"
#define MICROVM_MACHINE_PCIE "pcie"
+#define MICROVM_MACHINE_IOAPIC2 "ioapic2"
#define MICROVM_MACHINE_ISA_SERIAL "isa-serial"
#define MICROVM_MACHINE_OPTION_ROMS "x-option-roms"
#define MICROVM_MACHINE_AUTO_KERNEL_CMDLINE "auto-kernel-cmdline"
@@ -90,6 +91,7 @@ struct MicrovmMachineState {
OnOffAuto pit;
OnOffAuto rtc;
OnOffAuto pcie;
+ OnOffAuto ioapic2;
bool isa_serial;
bool option_roms;
bool auto_kernel_cmdline;
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index 829b376a1278..56886086133c 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -145,32 +145,53 @@ static void create_gpex(MicrovmMachineState *mms)
}
}
+static int microvm_ioapics(MicrovmMachineState *mms)
+{
+ if (!x86_machine_is_acpi_enabled(X86_MACHINE(mms))) {
+ return 1;
+ }
+ if (mms->ioapic2 == ON_OFF_AUTO_OFF) {
+ return 1;
+ }
+ return 2;
+}
+
static void microvm_devices_init(MicrovmMachineState *mms)
{
X86MachineState *x86ms = X86_MACHINE(mms);
ISABus *isa_bus;
ISADevice *rtc_state;
GSIState *gsi_state;
+ int ioapics;
int i;
/* Core components */
-
+ ioapics = microvm_ioapics(mms);
gsi_state = g_malloc0(sizeof(*gsi_state));
- x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state, GSI_NUM_PINS);
+ x86ms->gsi = qemu_allocate_irqs(gsi_handler, gsi_state,
+ IOAPIC_NUM_PINS * ioapics);
isa_bus = isa_bus_new(NULL, get_system_memory(), get_system_io(),
&error_abort);
isa_bus_irqs(isa_bus, x86ms->gsi);
ioapic_init_gsi(gsi_state, "machine");
+ if (ioapics > 1) {
+ x86ms->ioapic2 = ioapic_init_secondary(gsi_state);
+ }
kvmclock_create(true);
mms->virtio_irq_base = 5;
mms->virtio_num_transports = 8;
- if (x86_machine_is_acpi_enabled(x86ms)) {
- mms->pcie_irq_base = 12;
- mms->virtio_irq_base = 16;
+ if (x86ms->ioapic2) {
+ mms->pcie_irq_base = 16; /* 16 -> 19 */
+ /* use second ioapic (24 -> 47) for virtio-mmio irq lines */
+ mms->virtio_irq_base = IO_APIC_SECONDARY_IRQBASE;
+ mms->virtio_num_transports = IOAPIC_NUM_PINS;
+ } else if (x86_machine_is_acpi_enabled(x86ms)) {
+ mms->pcie_irq_base = 12; /* 12 -> 15 */
+ mms->virtio_irq_base = 16; /* 16 -> 23 */
}
for (i = 0; i < mms->virtio_num_transports; i++) {
@@ -544,6 +565,23 @@ static void microvm_machine_set_pcie(Object *obj, Visitor *v, const char *name,
visit_type_OnOffAuto(v, name, &mms->pcie, errp);
}
+static void microvm_machine_get_ioapic2(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ MicrovmMachineState *mms = MICROVM_MACHINE(obj);
+ OnOffAuto ioapic2 = mms->ioapic2;
+
+ visit_type_OnOffAuto(v, name, &ioapic2, errp);
+}
+
+static void microvm_machine_set_ioapic2(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ MicrovmMachineState *mms = MICROVM_MACHINE(obj);
+
+ visit_type_OnOffAuto(v, name, &mms->ioapic2, errp);
+}
+
static bool microvm_machine_get_isa_serial(Object *obj, Error **errp)
{
MicrovmMachineState *mms = MICROVM_MACHINE(obj);
@@ -620,6 +658,7 @@ static void microvm_machine_initfn(Object *obj)
mms->pit = ON_OFF_AUTO_AUTO;
mms->rtc = ON_OFF_AUTO_AUTO;
mms->pcie = ON_OFF_AUTO_AUTO;
+ mms->ioapic2 = ON_OFF_AUTO_AUTO;
mms->isa_serial = true;
mms->option_roms = true;
mms->auto_kernel_cmdline = true;
@@ -693,6 +732,13 @@ static void microvm_class_init(ObjectClass *oc, void *data)
object_class_property_set_description(oc, MICROVM_MACHINE_PCIE,
"Enable PCIe");
+ object_class_property_add(oc, MICROVM_MACHINE_IOAPIC2, "OnOffAuto",
+ microvm_machine_get_ioapic2,
+ microvm_machine_set_ioapic2,
+ NULL, NULL);
+ object_class_property_set_description(oc, MICROVM_MACHINE_IOAPIC2,
+ "Enable second IO-APIC");
+
object_class_property_add_bool(oc, MICROVM_MACHINE_ISA_SERIAL,
microvm_machine_get_isa_serial,
microvm_machine_set_isa_serial);
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index f23a5335a875..0a0ce76ffcf9 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1115,7 +1115,7 @@ static void test_acpi_microvm_tcg(void)
test_data data;
test_acpi_microvm_prepare(&data);
- test_acpi_one(" -machine microvm,acpi=on,rtc=off",
+ test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,rtc=off",
&data);
free_test_data(&data);
}
@@ -1126,7 +1126,7 @@ static void test_acpi_microvm_usb_tcg(void)
test_acpi_microvm_prepare(&data);
data.variant = ".usb";
- test_acpi_one(" -machine microvm,acpi=on,usb=on,rtc=off",
+ test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,usb=on,rtc=off",
&data);
free_test_data(&data);
}
@@ -1137,7 +1137,7 @@ static void test_acpi_microvm_rtc_tcg(void)
test_acpi_microvm_prepare(&data);
data.variant = ".rtc";
- test_acpi_one(" -machine microvm,acpi=on,rtc=on",
+ test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,rtc=on",
&data);
free_test_data(&data);
}
@@ -1149,7 +1149,7 @@ static void test_acpi_microvm_pcie_tcg(void)
test_acpi_microvm_prepare(&data);
data.variant = ".pcie";
data.tcg_only = true; /* need constant host-phys-bits */
- test_acpi_one(" -machine microvm,acpi=on,rtc=off,pcie=on",
+ test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,rtc=off,pcie=on",
&data);
free_test_data(&data);
}
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 07/12] microvm: add second ioapic
2020-12-03 10:54 ` [PATCH v3 07/12] microvm: add second ioapic Gerd Hoffmann
@ 2020-12-03 15:12 ` Sergio Lopez
0 siblings, 0 replies; 21+ messages in thread
From: Sergio Lopez @ 2020-12-03 15:12 UTC (permalink / raw)
To: Gerd Hoffmann
Cc: Eduardo Habkost, Michael S. Tsirkin, Richard Henderson,
qemu-devel, Igor Mammedov, Paolo Bonzini, Richard Henderson
[-- Attachment #1: Type: text/plain, Size: 586 bytes --]
On Thu, Dec 03, 2020 at 11:54:18AM +0100, Gerd Hoffmann wrote:
> Create second ioapic, route virtio-mmio IRQs to it,
> allow more virtio-mmio devices (24 instead of 8).
>
> Needs ACPI, enabled by default, can be turned off
> using -machine ioapic2=off
>
> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
> ---
> include/hw/i386/microvm.h | 2 ++
> hw/i386/microvm.c | 56 +++++++++++++++++++++++++++++++---
> tests/qtest/bios-tables-test.c | 8 ++---
> 3 files changed, 57 insertions(+), 9 deletions(-)
Reviewed-by: Sergio Lopez <slp@redhat.com>
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 21+ messages in thread
* [PATCH v3 08/12] tests/acpi: allow updates for expected data files
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (6 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 07/12] microvm: add second ioapic Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 10:54 ` [PATCH v3 09/12] tests/acpi: add data files for ioapic2 test variant Gerd Hoffmann
` (4 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8bf4..191ac230b013 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1 +1,3 @@
/* List of comma-separated changed AML files to ignore */
+"tests/data/acpi/microvm/APIC.ioapic2",
+"tests/data/acpi/microvm/DSDT.ioapic2",
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v3 09/12] tests/acpi: add data files for ioapic2 test variant
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (7 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 08/12] tests/acpi: allow updates for expected data files Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 10:54 ` [PATCH v3 10/12] tests/acpi: add ioapic2=on test for microvm Gerd Hoffmann
` (3 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
Copy microvm/APIC -> microvm/APIC.ioapic2
Copy microvm/DSDT -> microvm/DSDT.ioapic2
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
tests/data/acpi/microvm/APIC.ioapic2 | Bin 0 -> 70 bytes
tests/data/acpi/microvm/DSDT.ioapic2 | Bin 0 -> 365 bytes
2 files changed, 0 insertions(+), 0 deletions(-)
create mode 100644 tests/data/acpi/microvm/APIC.ioapic2
create mode 100644 tests/data/acpi/microvm/DSDT.ioapic2
diff --git a/tests/data/acpi/microvm/APIC.ioapic2 b/tests/data/acpi/microvm/APIC.ioapic2
new file mode 100644
index 0000000000000000000000000000000000000000..7472c7e830b6c7139720e93dd544d4441556661d
GIT binary patch
literal 70
zcmZ<^@N{-#U|?Xp?&R<65v<@85#a0y6k`O6f!H9Lf#JbFFwFr}2jnsGfW!{`1CcCj
H|A7Jk<Z=uF
literal 0
HcmV?d00001
diff --git a/tests/data/acpi/microvm/DSDT.ioapic2 b/tests/data/acpi/microvm/DSDT.ioapic2
new file mode 100644
index 0000000000000000000000000000000000000000..b43f427a222a933d3f34aceab6224a2c6115c365
GIT binary patch
literal 365
zcmX9(%SyvQ6upy2n@pNIKA<QF#Sf5arMONe(=?DaG1G?-VTyaft+=UO6kPiQ{RBV7
z&*`dor`gOs_nbMLa}$-!-w1&98W&=s`tfrq66BBqgUw{=rB<=7xA)_f7<+n>CE=5t
zE;#2y@U)soH1M>j)Okp0N|?)B()oaTI~2uqaQfeg{#@eeMV8=e3}=mj(J&<k`(T52
z$G~{<Rw@(SghZmuI3GM<2s%R)5Sg4V4Zd4o6Cc~5X(KC{LI+@fq)z=6m{mw6^ZwPX
zmdm;SZkF|){d}&e1=QM=t170OdV6g^6IRYjF1Tp2ut@AIEB@GM`K&7N+EF9YHntEE
jUShi3(B94m0^Q#uSOD0Iklv{mV=rh>BYn|!sEgD;a<EMS
literal 0
HcmV?d00001
--
2.27.0
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v3 10/12] tests/acpi: add ioapic2=on test for microvm
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (8 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 09/12] tests/acpi: add data files for ioapic2 test variant Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 10:54 ` [PATCH v3 11/12] tests/acpi: update expected data files Gerd Hoffmann
` (2 subsequent siblings)
12 siblings, 0 replies; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
APIC table changes:
[034h 0052 1] Subtable Type : 01 [I/O APIC]
[035h 0053 1] Length : 0C
[036h 0054 1] I/O Apic ID : 00
[037h 0055 1] Reserved : 00
[038h 0056 4] Address : FEC00000
[03Ch 0060 4] Interrupt : 00000000
+[040h 0064 1] Subtable Type : 01 [I/O APIC]
+[041h 0065 1] Length : 0C
+[042h 0066 1] I/O Apic ID : 01
+[043h 0067 1] Reserved : 00
+[044h 0068 4] Address : FEC10000
+[048h 0072 4] Interrupt : 00000018
DSDT table changes:
- Device (VR07)
+ Device (VR23)
{
Name (_HID, "LNRO0005") // _HID: Hardware ID
- Name (_UID, 0x07) // _UID: Unique ID
+ Name (_UID, 0x17) // _UID: Unique ID
Name (_CCA, One) // _CCA: Cache Coherency Attribute
Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings
{
Memory32Fixed (ReadWrite,
- 0xFEB00E00, // Address Base
+ 0xFEB02E00, // Address Base
0x00000200, // Address Length
)
Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
{
- 0x00000017,
+ 0x0000002F,
}
})
}
}
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
tests/qtest/bios-tables-test.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 0a0ce76ffcf9..4c4e6dd1e9cc 100644
--- a/tests/qtest/bios-tables-test.c
+++ b/tests/qtest/bios-tables-test.c
@@ -1154,6 +1154,17 @@ static void test_acpi_microvm_pcie_tcg(void)
free_test_data(&data);
}
+static void test_acpi_microvm_ioapic2_tcg(void)
+{
+ test_data data;
+
+ test_acpi_microvm_prepare(&data);
+ data.variant = ".ioapic2";
+ test_acpi_one(" -machine microvm,acpi=on,ioapic2=on,rtc=off",
+ &data);
+ free_test_data(&data);
+}
+
static void test_acpi_virt_tcg_numamem(void)
{
test_data data = {
@@ -1280,6 +1291,7 @@ int main(int argc, char *argv[])
qtest_add_func("acpi/microvm", test_acpi_microvm_tcg);
qtest_add_func("acpi/microvm/usb", test_acpi_microvm_usb_tcg);
qtest_add_func("acpi/microvm/rtc", test_acpi_microvm_rtc_tcg);
+ qtest_add_func("acpi/microvm/ioapic2", test_acpi_microvm_ioapic2_tcg);
if (strcmp(arch, "x86_64") == 0) {
qtest_add_func("acpi/microvm/pcie", test_acpi_microvm_pcie_tcg);
}
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH v3 11/12] tests/acpi: update expected data files
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (9 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 10/12] tests/acpi: add ioapic2=on test for microvm Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 10:54 ` [PATCH v3 12/12] tests/acpi: disallow updates for " Gerd Hoffmann
2020-12-03 11:01 ` [PATCH v3 00/12] microvm: add second ioapic Michael S. Tsirkin
12 siblings, 0 replies; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
tests/data/acpi/microvm/APIC.ioapic2 | Bin 70 -> 82 bytes
tests/data/acpi/microvm/DSDT.ioapic2 | Bin 365 -> 365 bytes
2 files changed, 0 insertions(+), 0 deletions(-)
diff --git a/tests/data/acpi/microvm/APIC.ioapic2 b/tests/data/acpi/microvm/APIC.ioapic2
index 7472c7e830b6c7139720e93dd544d4441556661d..a305f89d99eca881109ba54090da0f90262a402c 100644
GIT binary patch
delta 35
ncmZ<@;&Ke|bPi%*U|@VUk;_bok%tk;KKM@pNV2f~2MPlKf^P=P
delta 23
dcmWG?<8ln}barE4U|_sHk;{yYh3!9(2>?8v1it_P
diff --git a/tests/data/acpi/microvm/DSDT.ioapic2 b/tests/data/acpi/microvm/DSDT.ioapic2
index b43f427a222a933d3f34aceab6224a2c6115c365..aee44dd3de1bb16585bf571ff0ca8e44d467d009 100644
GIT binary patch
delta 83
zcmaFM^p=UsCD<h-myv;iNoFIL2qTk`@ni)?Q44X7cxPuvMj#m!EGWe#-p0wm$e_33
k9|IEuLnj*pBcnb814AW)fItibM|`kpybwDJ7b{Q*0Kl;hS^xk5
delta 83
zcmaFM^p=UsCD<h-myv;iDQP2@2qTk$`D6t~Q44mCcxPuvMj#m!EGWe#-p0wm$iTPZ
k9|IEuLnj*pBcnJ214AW)fItibM|`kpybwDJ7b{Q*0LlRlS^xk5
--
2.27.0
^ permalink raw reply [flat|nested] 21+ messages in thread* [PATCH v3 12/12] tests/acpi: disallow updates for expected data files
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (10 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 11/12] tests/acpi: update expected data files Gerd Hoffmann
@ 2020-12-03 10:54 ` Gerd Hoffmann
2020-12-03 11:01 ` [PATCH v3 00/12] microvm: add second ioapic Michael S. Tsirkin
12 siblings, 0 replies; 21+ messages in thread
From: Gerd Hoffmann @ 2020-12-03 10:54 UTC (permalink / raw)
To: qemu-devel
Cc: Eduardo Habkost, Sergio Lopez, Michael S. Tsirkin,
Richard Henderson, Gerd Hoffmann, Igor Mammedov, Paolo Bonzini,
Richard Henderson
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
---
tests/qtest/bios-tables-test-allowed-diff.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h
index 191ac230b013..dfb8523c8bf4 100644
--- a/tests/qtest/bios-tables-test-allowed-diff.h
+++ b/tests/qtest/bios-tables-test-allowed-diff.h
@@ -1,3 +1 @@
/* List of comma-separated changed AML files to ignore */
-"tests/data/acpi/microvm/APIC.ioapic2",
-"tests/data/acpi/microvm/DSDT.ioapic2",
--
2.27.0
^ permalink raw reply related [flat|nested] 21+ messages in thread* Re: [PATCH v3 00/12] microvm: add second ioapic
2020-12-03 10:54 [PATCH v3 00/12] microvm: add second ioapic Gerd Hoffmann
` (11 preceding siblings ...)
2020-12-03 10:54 ` [PATCH v3 12/12] tests/acpi: disallow updates for " Gerd Hoffmann
@ 2020-12-03 11:01 ` Michael S. Tsirkin
12 siblings, 0 replies; 21+ messages in thread
From: Michael S. Tsirkin @ 2020-12-03 11:01 UTC (permalink / raw)
To: Gerd Hoffmann
Cc: Eduardo Habkost, Sergio Lopez, Richard Henderson, qemu-devel,
Igor Mammedov, Paolo Bonzini, Richard Henderson
On Thu, Dec 03, 2020 at 11:54:11AM +0100, Gerd Hoffmann wrote:
> Add a second ioapic to microvm. Gives us more IRQ lines we can
> use for virtio-mmio devices. Bump number of possible virtio-mmio
> devices from 8 to 24.
acpi things all look ok:
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> v3:
> - pick up some review tags.
> - replace magic numbers with #defines.
> - add asl changes to commit messages.
> v2:
> - reorganize code a bit.
> - add ioapic2= option to microvm.
>
> Gerd Hoffmann (12):
> [testing] disable xhci msix
> x86: rewrite gsi_handler()
> x86: add support for second ioapic
> microvm: make number of virtio transports runtime changeable
> microvm: make pcie irq base runtime changeable
> microvm: drop microvm_gsi_handler()
> microvm: add second ioapic
> tests/acpi: allow updates for expected data files
> tests/acpi: add data files for ioapic2 test variant
> tests/acpi: add ioapic2=on test for microvm
> tests/acpi: update expected data files
> tests/acpi: disallow updates for expected data files
>
> include/hw/i386/ioapic.h | 2 +
> include/hw/i386/ioapic_internal.h | 2 +-
> include/hw/i386/microvm.h | 6 +-
> include/hw/i386/x86.h | 3 +
> hw/i386/acpi-common.c | 10 ++++
> hw/i386/microvm.c | 82 ++++++++++++++++++++-------
> hw/i386/x86.c | 35 ++++++++++--
> hw/usb/hcd-xhci-pci.c | 2 +-
> tests/qtest/bios-tables-test.c | 20 +++++--
> tests/data/acpi/microvm/APIC.ioapic2 | Bin 0 -> 82 bytes
> tests/data/acpi/microvm/DSDT.ioapic2 | Bin 0 -> 365 bytes
> 11 files changed, 129 insertions(+), 33 deletions(-)
> create mode 100644 tests/data/acpi/microvm/APIC.ioapic2
> create mode 100644 tests/data/acpi/microvm/DSDT.ioapic2
>
> --
> 2.27.0
>
^ permalink raw reply [flat|nested] 21+ messages in thread