From: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
To: Gautham R Shenoy <ego@linux.vnet.ibm.com>
Cc: Nathan Lynch <nathanl@linux.ibm.com>,
Michael Neuling <mikey@neuling.org>,
Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>,
Peter Zijlstra <peterz@infradead.org>,
linux-kernel@vger.kernel.org, Nicholas Piggin <npiggin@gmail.com>,
linuxppc-dev@lists.ozlabs.org,
Valentin Schneider <valentin.schneider@arm.com>
Subject: Re: [PATCH 3/3] powerpc/cacheinfo: Print correct cache-sibling map/list for L2 cache
Date: Wed, 9 Dec 2020 14:09:21 +0530 [thread overview]
Message-ID: <20201209083921.GL528281@linux.vnet.ibm.com> (raw)
In-Reply-To: <20201208175647.GC14206@in.ibm.com>
* Gautham R Shenoy <ego@linux.vnet.ibm.com> [2020-12-08 23:26:47]:
> > The drawback of this is even if cpus 0,2,4,6 are released L1 cache will not
> > be released. Is this as expected?
>
> cacheinfo populates the cache->shared_cpu_map on the basis of which
> CPUs share the common device-tree node for a particular cache. There
> is one l1-cache object in the device-tree for a CPU node corresponding
> to a big-core. That the L1 is further split between the threads of the
> core is shown using ibm,thread-groups.
>
Yes.
> The ideal thing would be to add a "group_leader" field to "struct
> cache" so that we can create separate cache objects , one per thread
> group. I will take a stab at this in the v2.
>
I am not saying this needs to be done immediately. We could add a TODO and
get it done later. Your patch is not making it worse. Its just that there is
still something more left to be done.
--
Thanks and Regards
Srikar Dronamraju
WARNING: multiple messages have this Message-ID (diff)
From: Srikar Dronamraju <srikar@linux.vnet.ibm.com>
To: Gautham R Shenoy <ego@linux.vnet.ibm.com>
Cc: Anton Blanchard <anton@ozlabs.org>,
Vaidyanathan Srinivasan <svaidy@linux.vnet.ibm.com>,
Michael Ellerman <mpe@ellerman.id.au>,
Michael Neuling <mikey@neuling.org>,
Nicholas Piggin <npiggin@gmail.com>,
Nathan Lynch <nathanl@linux.ibm.com>,
Peter Zijlstra <peterz@infradead.org>,
Valentin Schneider <valentin.schneider@arm.com>,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] powerpc/cacheinfo: Print correct cache-sibling map/list for L2 cache
Date: Wed, 9 Dec 2020 14:09:21 +0530 [thread overview]
Message-ID: <20201209083921.GL528281@linux.vnet.ibm.com> (raw)
In-Reply-To: <20201208175647.GC14206@in.ibm.com>
* Gautham R Shenoy <ego@linux.vnet.ibm.com> [2020-12-08 23:26:47]:
> > The drawback of this is even if cpus 0,2,4,6 are released L1 cache will not
> > be released. Is this as expected?
>
> cacheinfo populates the cache->shared_cpu_map on the basis of which
> CPUs share the common device-tree node for a particular cache. There
> is one l1-cache object in the device-tree for a CPU node corresponding
> to a big-core. That the L1 is further split between the threads of the
> core is shown using ibm,thread-groups.
>
Yes.
> The ideal thing would be to add a "group_leader" field to "struct
> cache" so that we can create separate cache objects , one per thread
> group. I will take a stab at this in the v2.
>
I am not saying this needs to be done immediately. We could add a TODO and
get it done later. Your patch is not making it worse. Its just that there is
still something more left to be done.
--
Thanks and Regards
Srikar Dronamraju
next prev parent reply other threads:[~2020-12-09 8:41 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-04 4:48 [PATCH 0/3] Extend Parsing "ibm, thread-groups" for Shared-L2 information Gautham R. Shenoy
2020-12-04 4:48 ` [PATCH 0/3] Extend Parsing "ibm,thread-groups" " Gautham R. Shenoy
2020-12-04 4:48 ` [PATCH 1/3] powerpc/smp: Parse ibm, thread-groups with multiple properties Gautham R. Shenoy
2020-12-04 4:48 ` [PATCH 1/3] powerpc/smp: Parse ibm,thread-groups " Gautham R. Shenoy
2020-12-07 12:10 ` Srikar Dronamraju
2020-12-07 12:10 ` Srikar Dronamraju
2020-12-08 17:25 ` Gautham R Shenoy
2020-12-08 17:25 ` Gautham R Shenoy
2020-12-09 3:59 ` [PATCH 1/3] powerpc/smp: Parse ibm, thread-groups " Michael Ellerman
2020-12-09 3:59 ` [PATCH 1/3] powerpc/smp: Parse ibm,thread-groups " Michael Ellerman
2020-12-09 8:35 ` Srikar Dronamraju
2020-12-09 8:35 ` Srikar Dronamraju
2020-12-09 9:05 ` Gautham R Shenoy
2020-12-09 9:05 ` Gautham R Shenoy
2020-12-04 4:48 ` [PATCH 2/3] powerpc/smp: Add support detecting thread-groups sharing L2 cache Gautham R. Shenoy
2020-12-04 4:48 ` Gautham R. Shenoy
2020-12-07 12:40 ` Srikar Dronamraju
2020-12-07 12:40 ` Srikar Dronamraju
2020-12-08 17:42 ` Gautham R Shenoy
2020-12-08 17:42 ` Gautham R Shenoy
2020-12-09 9:14 ` Srikar Dronamraju
2020-12-09 9:14 ` Srikar Dronamraju
2020-12-04 4:48 ` [PATCH 3/3] powerpc/cacheinfo: Print correct cache-sibling map/list for " Gautham R. Shenoy
2020-12-04 4:48 ` Gautham R. Shenoy
2020-12-04 10:32 ` kernel test robot
2020-12-07 13:11 ` Srikar Dronamraju
2020-12-07 13:11 ` Srikar Dronamraju
2020-12-08 17:56 ` Gautham R Shenoy
2020-12-08 17:56 ` Gautham R Shenoy
2020-12-09 8:39 ` Srikar Dronamraju [this message]
2020-12-09 8:39 ` Srikar Dronamraju
2020-12-09 9:07 ` Gautham R Shenoy
2020-12-09 9:07 ` Gautham R Shenoy
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