From: Shawn Guo <shawnguo@kernel.org>
To: Liu Ying <victor.liu@nxp.com>
Cc: linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
mturquette@baylibre.com, sboyd@kernel.org,
s.hauer@pengutronix.de, kernel@pengutronix.de,
festevam@gmail.com, linux-imx@nxp.com, robh+dt@kernel.org,
aisheng.dong@nxp.com
Subject: Re: [PATCH v2 0/4] Add some clocks support for i.MX8qxp DC0/MIPI-LVDS subsystems
Date: Tue, 5 Jan 2021 10:56:08 +0800 [thread overview]
Message-ID: <20210105025607.GI4142@dragon> (raw)
In-Reply-To: <1606887219-5854-1-git-send-email-victor.liu@nxp.com>
On Wed, Dec 02, 2020 at 01:33:35PM +0800, Liu Ying wrote:
> This patch set adds some SCU clocks support for i.MX8qxp DC0/MIPI-LVDS
> subsystems.
>
> With this patch set, some basic clocks for i.MX8qxp LVDS displays can be got
> by drivers.
>
> v1->v2:
> * Drop LPCG clocks as they can be registered directly in an in-tree new
> DT binding way.
> * Add DC0 bypass clocks support.
> * Correct the way to register DC0 display clocks.
> * Trivial tweak.
>
> Liu Ying (4):
> clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 PLL clocks
> clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 bypass clocks
> clk: imx: clk-imx8qxp: Register DC0 display clocks with imx_clk_scu2()
> clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS
> subsystems
Applied all, thanks.
WARNING: multiple messages have this Message-ID (diff)
From: Shawn Guo <shawnguo@kernel.org>
To: Liu Ying <victor.liu@nxp.com>
Cc: aisheng.dong@nxp.com, devicetree@vger.kernel.org,
s.hauer@pengutronix.de, sboyd@kernel.org,
mturquette@baylibre.com, linux-kernel@vger.kernel.org,
robh+dt@kernel.org, linux-imx@nxp.com, kernel@pengutronix.de,
festevam@gmail.com, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 0/4] Add some clocks support for i.MX8qxp DC0/MIPI-LVDS subsystems
Date: Tue, 5 Jan 2021 10:56:08 +0800 [thread overview]
Message-ID: <20210105025607.GI4142@dragon> (raw)
In-Reply-To: <1606887219-5854-1-git-send-email-victor.liu@nxp.com>
On Wed, Dec 02, 2020 at 01:33:35PM +0800, Liu Ying wrote:
> This patch set adds some SCU clocks support for i.MX8qxp DC0/MIPI-LVDS
> subsystems.
>
> With this patch set, some basic clocks for i.MX8qxp LVDS displays can be got
> by drivers.
>
> v1->v2:
> * Drop LPCG clocks as they can be registered directly in an in-tree new
> DT binding way.
> * Add DC0 bypass clocks support.
> * Correct the way to register DC0 display clocks.
> * Trivial tweak.
>
> Liu Ying (4):
> clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 PLL clocks
> clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 bypass clocks
> clk: imx: clk-imx8qxp: Register DC0 display clocks with imx_clk_scu2()
> clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS
> subsystems
Applied all, thanks.
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next prev parent reply other threads:[~2021-01-05 2:56 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-02 5:33 [PATCH v2 0/4] Add some clocks support for i.MX8qxp DC0/MIPI-LVDS subsystems Liu Ying
2020-12-02 5:33 ` Liu Ying
2020-12-02 5:33 ` [PATCH v2 1/4] clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 PLL clocks Liu Ying
2020-12-02 5:33 ` Liu Ying
2020-12-02 5:33 ` [PATCH v2 2/4] clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 bypass clocks Liu Ying
2020-12-02 5:33 ` Liu Ying
2020-12-02 5:33 ` [PATCH v2 3/4] clk: imx: clk-imx8qxp: Register DC0 display clocks with imx_clk_scu2() Liu Ying
2020-12-02 5:33 ` Liu Ying
2020-12-02 5:33 ` [PATCH v2 4/4] clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS subsystems Liu Ying
2020-12-02 5:33 ` Liu Ying
2020-12-17 10:34 ` [PATCH v2 0/4] Add some clocks support for i.MX8qxp DC0/MIPI-LVDS subsystems Stephen Boyd
2020-12-17 10:34 ` Stephen Boyd
2021-01-05 2:56 ` Shawn Guo [this message]
2021-01-05 2:56 ` Shawn Guo
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