From: Hsin-Yi Wang <hsinyi@chromium.org>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
David Airlie <airlied@linux.ie>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
Daniel Vetter <daniel@ffwll.ch>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 6/8] drm/mediatek: add matrix bits private data for ccorr
Date: Fri, 29 Jan 2021 15:34:34 +0800 [thread overview]
Message-ID: <20210129073436.2429834-7-hsinyi@chromium.org> (raw)
In-Reply-To: <20210129073436.2429834-1-hsinyi@chromium.org>
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
matrix bits of mt8183 is 12
matrix bits of mt8192 is 13
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
index 0c68090eb1e92..1c7163a12f3b1 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
@@ -31,8 +31,10 @@
#define DISP_CCORR_COEF_3 0x008C
#define DISP_CCORR_COEF_4 0x0090
+#define CCORR_MATRIX_BITS 12
+
struct mtk_disp_ccorr_data {
- u32 reserved;
+ u32 matrix_bits;
};
/**
@@ -116,6 +118,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
uint16_t coeffs[9] = { 0 };
int i;
struct cmdq_pkt *cmdq_pkt = NULL;
+ u32 matrix_bits;
if (!blob)
return;
@@ -123,8 +126,16 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
ctm = (struct drm_color_ctm *)blob->data;
input = ctm->matrix;
- for (i = 0; i < ARRAY_SIZE(coeffs); i++)
+ if (ccorr->data)
+ matrix_bits = ccorr->data->matrix_bits;
+ else
+ matrix_bits = CCORR_MATRIX_BITS;
+
+ for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]);
+ if (matrix_bits > CCORR_MATRIX_BITS)
+ coeffs[i] <<= (matrix_bits - CCORR_MATRIX_BITS);
+ }
mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
@@ -205,8 +216,13 @@ static int mtk_disp_ccorr_remove(struct platform_device *pdev)
return 0;
}
+static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = {
+ .matrix_bits = CCORR_MATRIX_BITS,
+};
+
static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {
- { .compatible = "mediatek,mt8183-disp-ccorr"},
+ { .compatible = "mediatek,mt8183-disp-ccorr",
+ .data = &mt8183_ccorr_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);
--
2.30.0.365.g02bc693789-goog
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
WARNING: multiple messages have this Message-ID (diff)
From: Hsin-Yi Wang <hsinyi@chromium.org>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
David Airlie <airlied@linux.ie>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
Daniel Vetter <daniel@ffwll.ch>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 6/8] drm/mediatek: add matrix bits private data for ccorr
Date: Fri, 29 Jan 2021 15:34:34 +0800 [thread overview]
Message-ID: <20210129073436.2429834-7-hsinyi@chromium.org> (raw)
In-Reply-To: <20210129073436.2429834-1-hsinyi@chromium.org>
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
matrix bits of mt8183 is 12
matrix bits of mt8192 is 13
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
index 0c68090eb1e92..1c7163a12f3b1 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
@@ -31,8 +31,10 @@
#define DISP_CCORR_COEF_3 0x008C
#define DISP_CCORR_COEF_4 0x0090
+#define CCORR_MATRIX_BITS 12
+
struct mtk_disp_ccorr_data {
- u32 reserved;
+ u32 matrix_bits;
};
/**
@@ -116,6 +118,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
uint16_t coeffs[9] = { 0 };
int i;
struct cmdq_pkt *cmdq_pkt = NULL;
+ u32 matrix_bits;
if (!blob)
return;
@@ -123,8 +126,16 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
ctm = (struct drm_color_ctm *)blob->data;
input = ctm->matrix;
- for (i = 0; i < ARRAY_SIZE(coeffs); i++)
+ if (ccorr->data)
+ matrix_bits = ccorr->data->matrix_bits;
+ else
+ matrix_bits = CCORR_MATRIX_BITS;
+
+ for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]);
+ if (matrix_bits > CCORR_MATRIX_BITS)
+ coeffs[i] <<= (matrix_bits - CCORR_MATRIX_BITS);
+ }
mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
@@ -205,8 +216,13 @@ static int mtk_disp_ccorr_remove(struct platform_device *pdev)
return 0;
}
+static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = {
+ .matrix_bits = CCORR_MATRIX_BITS,
+};
+
static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {
- { .compatible = "mediatek,mt8183-disp-ccorr"},
+ { .compatible = "mediatek,mt8183-disp-ccorr",
+ .data = &mt8183_ccorr_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);
--
2.30.0.365.g02bc693789-goog
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Hsin-Yi Wang <hsinyi@chromium.org>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
Mark Rutland <mark.rutland@arm.com>,
dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>
Subject: [PATCH v4 6/8] drm/mediatek: add matrix bits private data for ccorr
Date: Fri, 29 Jan 2021 15:34:34 +0800 [thread overview]
Message-ID: <20210129073436.2429834-7-hsinyi@chromium.org> (raw)
In-Reply-To: <20210129073436.2429834-1-hsinyi@chromium.org>
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
matrix bits of mt8183 is 12
matrix bits of mt8192 is 13
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
index 0c68090eb1e92..1c7163a12f3b1 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
@@ -31,8 +31,10 @@
#define DISP_CCORR_COEF_3 0x008C
#define DISP_CCORR_COEF_4 0x0090
+#define CCORR_MATRIX_BITS 12
+
struct mtk_disp_ccorr_data {
- u32 reserved;
+ u32 matrix_bits;
};
/**
@@ -116,6 +118,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
uint16_t coeffs[9] = { 0 };
int i;
struct cmdq_pkt *cmdq_pkt = NULL;
+ u32 matrix_bits;
if (!blob)
return;
@@ -123,8 +126,16 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
ctm = (struct drm_color_ctm *)blob->data;
input = ctm->matrix;
- for (i = 0; i < ARRAY_SIZE(coeffs); i++)
+ if (ccorr->data)
+ matrix_bits = ccorr->data->matrix_bits;
+ else
+ matrix_bits = CCORR_MATRIX_BITS;
+
+ for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]);
+ if (matrix_bits > CCORR_MATRIX_BITS)
+ coeffs[i] <<= (matrix_bits - CCORR_MATRIX_BITS);
+ }
mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
@@ -205,8 +216,13 @@ static int mtk_disp_ccorr_remove(struct platform_device *pdev)
return 0;
}
+static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = {
+ .matrix_bits = CCORR_MATRIX_BITS,
+};
+
static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {
- { .compatible = "mediatek,mt8183-disp-ccorr"},
+ { .compatible = "mediatek,mt8183-disp-ccorr",
+ .data = &mt8183_ccorr_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);
--
2.30.0.365.g02bc693789-goog
WARNING: multiple messages have this Message-ID (diff)
From: Hsin-Yi Wang <hsinyi@chromium.org>
To: CK Hu <ck.hu@mediatek.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
Yongqiang Niu <yongqiang.niu@mediatek.com>,
David Airlie <airlied@linux.ie>,
linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
linux-mediatek@lists.infradead.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 6/8] drm/mediatek: add matrix bits private data for ccorr
Date: Fri, 29 Jan 2021 15:34:34 +0800 [thread overview]
Message-ID: <20210129073436.2429834-7-hsinyi@chromium.org> (raw)
In-Reply-To: <20210129073436.2429834-1-hsinyi@chromium.org>
From: Yongqiang Niu <yongqiang.niu@mediatek.com>
matrix bits of mt8183 is 12
matrix bits of mt8192 is 13
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
---
drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
index 0c68090eb1e92..1c7163a12f3b1 100644
--- a/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
+++ b/drivers/gpu/drm/mediatek/mtk_disp_ccorr.c
@@ -31,8 +31,10 @@
#define DISP_CCORR_COEF_3 0x008C
#define DISP_CCORR_COEF_4 0x0090
+#define CCORR_MATRIX_BITS 12
+
struct mtk_disp_ccorr_data {
- u32 reserved;
+ u32 matrix_bits;
};
/**
@@ -116,6 +118,7 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
uint16_t coeffs[9] = { 0 };
int i;
struct cmdq_pkt *cmdq_pkt = NULL;
+ u32 matrix_bits;
if (!blob)
return;
@@ -123,8 +126,16 @@ void mtk_ccorr_ctm_set(struct device *dev, struct drm_crtc_state *state)
ctm = (struct drm_color_ctm *)blob->data;
input = ctm->matrix;
- for (i = 0; i < ARRAY_SIZE(coeffs); i++)
+ if (ccorr->data)
+ matrix_bits = ccorr->data->matrix_bits;
+ else
+ matrix_bits = CCORR_MATRIX_BITS;
+
+ for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
coeffs[i] = mtk_ctm_s31_32_to_s1_10(input[i]);
+ if (matrix_bits > CCORR_MATRIX_BITS)
+ coeffs[i] <<= (matrix_bits - CCORR_MATRIX_BITS);
+ }
mtk_ddp_write(cmdq_pkt, coeffs[0] << 16 | coeffs[1],
&ccorr->cmdq_reg, ccorr->regs, DISP_CCORR_COEF_0);
@@ -205,8 +216,13 @@ static int mtk_disp_ccorr_remove(struct platform_device *pdev)
return 0;
}
+static const struct mtk_disp_ccorr_data mt8183_ccorr_driver_data = {
+ .matrix_bits = CCORR_MATRIX_BITS,
+};
+
static const struct of_device_id mtk_disp_ccorr_driver_dt_match[] = {
- { .compatible = "mediatek,mt8183-disp-ccorr"},
+ { .compatible = "mediatek,mt8183-disp-ccorr",
+ .data = &mt8183_ccorr_driver_data},
{},
};
MODULE_DEVICE_TABLE(of, mtk_disp_ccorr_driver_dt_match);
--
2.30.0.365.g02bc693789-goog
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2021-01-29 7:36 UTC|newest]
Thread overview: 76+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-29 7:34 [PATCH v4 0/8] drm/mediatek: add support for mediatek SOC MT8192 Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` [PATCH v4 1/8] drm/mediatek: add component OVL_2L2 Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` [PATCH v4 2/8] drm/mediatek: add component POSTMASK Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 8:18 ` CK Hu
2021-01-29 8:18 ` CK Hu
2021-01-29 8:18 ` CK Hu
2021-01-29 8:18 ` CK Hu
2021-01-29 8:32 ` Yongqiang Niu
2021-01-29 8:32 ` Yongqiang Niu
2021-01-29 8:32 ` Yongqiang Niu
2021-01-29 8:35 ` CK Hu, CK Hu, CK Hu
2021-01-29 8:35 ` CK Hu, CK Hu, CK Hu
2021-01-29 8:35 ` CK Hu, CK Hu, CK Hu
2021-01-29 8:49 ` Yongqiang Niu
2021-01-29 8:49 ` Yongqiang Niu
2021-01-29 8:49 ` Yongqiang Niu
2021-01-29 8:49 ` Yongqiang Niu
2021-01-29 8:51 ` Hsin-Yi Wang
2021-01-29 8:51 ` Hsin-Yi Wang
2021-01-29 8:51 ` Hsin-Yi Wang
2021-01-29 7:34 ` [PATCH v4 3/8] drm/mediatek: add component RDMA4 Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` [PATCH v4 4/8] drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 8:21 ` CK Hu
2021-01-29 8:21 ` CK Hu
2021-01-29 8:21 ` CK Hu
2021-01-29 8:21 ` CK Hu
2021-01-31 3:56 ` Chun-Kuang Hu
2021-01-31 3:56 ` Chun-Kuang Hu
2021-01-31 3:56 ` Chun-Kuang Hu
2021-01-31 3:56 ` Chun-Kuang Hu
2021-01-29 7:34 ` [PATCH v4 5/8] drm/mediatek: separate ccorr module Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-31 4:07 ` Chun-Kuang Hu
2021-01-31 4:07 ` Chun-Kuang Hu
2021-01-31 4:07 ` Chun-Kuang Hu
2021-01-31 4:07 ` Chun-Kuang Hu
2021-01-29 7:34 ` Hsin-Yi Wang [this message]
2021-01-29 7:34 ` [PATCH v4 6/8] drm/mediatek: add matrix bits private data for ccorr Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 8:40 ` CK Hu
2021-01-29 8:40 ` CK Hu
2021-01-29 8:40 ` CK Hu
2021-01-29 8:40 ` CK Hu
2021-01-29 8:59 ` Yongqiang Niu
2021-01-29 8:59 ` Yongqiang Niu
2021-01-29 8:59 ` Yongqiang Niu
2021-01-29 7:34 ` [PATCH v4 7/8] soc: mediatek: add mtk mutex support for MT8192 Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 8:42 ` CK Hu
2021-01-29 8:42 ` CK Hu
2021-01-29 8:42 ` CK Hu
2021-01-29 8:42 ` CK Hu
2021-01-29 7:34 ` [PATCH v4 8/8] drm/mediatek: add support for mediatek SOC MT8192 Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
2021-01-29 7:34 ` Hsin-Yi Wang
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